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    Searched refs:VR4122_MGIUINT_H_REG_W (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/hpcmips/vr/
vr4122ip.c	65 VR4122_GIUINT_H_REG_W,VR4122_MGIUINT_H_REG_W},
icureg.h	303 #define VR4122_MGIUINT_H_REG_W 0x028 /* Level2 Mask GIU intr reg High */ 313 #define MGIUINT_H_REG_W VR4122_MGIUINT_H_REG_W

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