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/src/sys/arch/hpcmips/vr/ | |
vr4122ip.c | 79 VR4122_PCIINT_REG_W,VR4122_MPCIINT_REG_W }, |
icureg.h | 371 #define VR4122_PCIINT_REG_W 0x2c /* Level2 PCI intr reg */ 381 #define PCIINT_REG_W VR4122_PCIINT_REG_W |