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    Searched refs:VR4181GIU_MODE_IN (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/hpcmips/vr/
vr4181giureg.h 46 #define VR4181GIU_MODE_IN 0x0
52 #define GP0_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 0)
53 #define GP0_CSISI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_ALT ) << 0)
55 #define GP1_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 2)
58 #define GP2_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 4)
59 #define GP2_CSICK ((VR4181GIU_MODE_IN | VR4181GIU_MODE_ALT ) << 4)
61 #define GP3_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 6)
64 #define GP4_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 8)
66 #define GP5_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 10)
69 #define GP6_GPI ((VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << 12
    [all...]
vr4181giu.c 349 r |= (VR4181GIU_MODE_IN | VR4181GIU_MODE_GPIO) << bitoff;

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