| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| am437x-sbc-t43.dts | 59 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
| imx53-qsb-common.dtsi | 297 /* VGA_HSYNC, VSYNC with max drive strength */
318 fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */
|
| imx6qdl-kontron-samx6i.dtsi | 589 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f1 /* VSYNC */
|
| am437x-sk-evm.dts | 371 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
891 vsync-active = <0>;
|
| am43x-epos-evm.dts | 432 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
983 vsync-active = <0>;
|
| at91sam9g45.dtsi | 281 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
|
| am437x-gp-evm.dts | 292 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
1072 vsync-active = <0>;
1089 vsync-active = <0>;
|
| /src/sys/dev/qbus/ |
| qdreg.h | 80 #define VSYNC 0x2000
|
| qd.c | 207 * services at VSYNC interrupt time. At interrupt time the driver loads
1002 qdflags[unit].adder_ie &= ~VSYNC;
1312 * map shared color map write buf and turn on vsync intrpt
1324 qdflags[unit].adder_ie |= VSYNC;
1334 * unmap shared color map write buffer and kill VSYNC intrpts
1347 qdflags[unit].adder_ie &= ~VSYNC;
2222 * service the vertical blank interrupt (VSYNC bit) by loading
2225 if (adder->status & VSYNC) {
2226 adder->status &= ~VSYNC; /* clear the interrupt */
2892 #define WSV (void)wait_status(adder, VSYNC); (void)wait_status(adder, VSYNC
[all...] |
| /src/sys/arch/vax/include/ |
| qdreg.h | 80 #define VSYNC 0x2000
|
| /src/sys/external/bsd/drm2/dist/drm/i2c/ |
| ch7006_mode.c | 128 DRM_MODE_FLAG_##vsynp##VSYNC, \
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_crt.c | 673 vsync_reg = VSYNC(pipe);
714 u32 vsync = I915_READ(vsync_reg); local in function:intel_crt_load_detect
715 u32 vsync_start = (vsync & 0xffff) + 1;
|
| icl_dsi.c | 903 I915_WRITE(VSYNC(dsi_trans),
|
| intel_display.c | 5665 I915_READ(VSYNC(cpu_transcoder)));
8646 I915_WRITE(VSYNC(cpu_transcoder),
8723 tmp = I915_READ(VSYNC(cpu_transcoder));
17727 I915_WRITE(VSYNC(pipe), (490 - 1) | ((492 - 1) << 16));
18639 u32 vsync; member in struct:intel_display_error_state::intel_transcoder_error_state
18719 error->transcoder[i].vsync = I915_READ(VSYNC(cpu_transcoder));
18782 err_printf(m, " VSYNC: %08x\n", error->transcoder[i].vsync);
|
| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_modes.c | 167 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; local in function:drm_cvt_mode
222 /* Determine VSync Width from aspect ratio */
224 vsync = 4;
226 vsync = 5;
228 vsync = 6;
230 vsync = 7;
232 vsync = 7;
234 vsync = 10;
257 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
258 vsyncandback_porch = vsync + CVT_MIN_V_PORCH
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
| handlers.c | 2115 MMIO_D(VSYNC(TRANSCODER_A), D_ALL);
2125 MMIO_D(VSYNC(TRANSCODER_B), D_ALL);
2135 MMIO_D(VSYNC(TRANSCODER_C), D_ALL);
2145 MMIO_D(VSYNC(TRANSCODER_EDP), D_ALL);
|
| /src/sys/external/bsd/drm2/dist/drm/i915/ |
| i915_reg.h | 4310 #define VSYNC(trans) _MMIO_TRANS2(trans, _VSYNC_A)
4692 /* VSYNC/HSYNC bits new with 965, default is to be set */
5306 /* Length of vsync, in half lines */
5309 /* Offset of the start of vsync in field 1, measured in one less than the
5315 * Offset of the start of vsync in field 2, measured in one less than the
5324 /* Length of vsync, in half lines */
|
