/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
intel_crt.c | 659 u32 vtotal, vactive; local in function:intel_crt_load_detect 671 vtotal_reg = VTOTAL(pipe); 681 vtotal = ((save_vtotal >> 16) & 0xfff) + 1; 713 if (vblank_start <= vactive && vblank_end >= vtotal) { 725 if (vblank_start - vactive >= vtotal - vblank_end) 728 vsample = (vtotal + vblank_end) >> 1;
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icl_dsi.c | 806 u16 vtotal, vactive, vsync_start, vsync_end, vsync_shift; local in function:gen11_dsi_set_transcoder_timings 830 vtotal = adjusted_mode->crtc_vtotal; 890 I915_WRITE(VTOTAL(dsi_trans), 891 (vactive - 1) | ((vtotal - 1) << 16)); 894 if (vsync_end < vsync_start || vsync_end > vtotal) 918 /* program TRANS_VBLANK register, should be same as vtotal programmed */ 923 (vactive - 1) | ((vtotal - 1) << 16));
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intel_display.c | 5661 I915_READ(VTOTAL(cpu_transcoder))); 8640 I915_WRITE(VTOTAL(cpu_transcoder), 8656 I915_WRITE(VTOTAL(pipe), I915_READ(VTOTAL(cpu_transcoder))); 8712 tmp = I915_READ(VTOTAL(cpu_transcoder)); 8758 mode->vtotal = pipe_config->hw.adjusted_mode.crtc_vtotal; 14175 * On most platforms it starts counting from vtotal-1 on the 14182 * of vtotal-1, so we have to subtract one (or rather add vtotal-1 14200 int vtotal; local in function:intel_crtc_update_active_timings 18637 u32 vtotal; member in struct:intel_display_error_state::intel_transcoder_error_state [all...] |
/src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
handlers.c | 2113 MMIO_D(VTOTAL(TRANSCODER_A), D_ALL); 2123 MMIO_D(VTOTAL(TRANSCODER_B), D_ALL); 2133 MMIO_D(VTOTAL(TRANSCODER_C), D_ALL); 2143 MMIO_D(VTOTAL(TRANSCODER_EDP), D_ALL);
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/src/sys/external/bsd/drm2/dist/drm/i915/ |
i915_reg.h | 4308 #define VTOTAL(trans) _MMIO_TRANS2(trans, _VTOTAL_A)
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