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/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	122 #define V_8 (FE_32 + 1) /* Vector reg. starting at position 8 */ 124 #define V_12 (V_8 + 1) /* Vector reg. starting at position 12 */ 484 #define INSTR_VRV_VVXRDU 6, { V_8,D_20,VX_12,B_16,U4_32,0 } /* e.g. vgef */ 485 #define INSTR_VRI_V0U 6, { V_8,U16_16,0,0,0,0 } /* e.g. vgbm */ 486 #define INSTR_VRI_V 6, { V_8,0,0,0,0,0 } /* e.g. vzero */ 487 #define INSTR_VRI_V0UUU 6, { V_8,U8_16,U8_24,U4_32,0,0 } /* e.g. vgm */ 488 #define INSTR_VRI_V0UU 6, { V_8,U8_16,U8_24,0,0,0 } /* e.g. vgmb */ 489 #define INSTR_VRI_V0UU2 6, { V_8,U16_16,U4_32,0,0,0 } /* e.g. vlip */ 490 #define INSTR_VRI_VVUU 6, { V_8,V_12,U16_16,U4_32,0,0 } /* e.g. vrep */ 491 #define INSTR_VRI_VVU 6, { V_8,V_12,U16_16,0,0,0 } /* e.g. vrepb *     [all...]
/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	124 #define V_8 (FE_32 + 1) /* Vector reg. starting at position 8 */ 126 #define V_12 (V_8 + 1) /* Vector reg. starting at position 12 */ 475 #define INSTR_VRV_VVXRDU 6, { V_8,D_20,VX_12,B_16,U4_32,0 } /* e.g. vgef */ 476 #define INSTR_VRI_V0U 6, { V_8,U16_16,0,0,0,0 } /* e.g. vgbm */ 477 #define INSTR_VRI_V 6, { V_8,0,0,0,0,0 } /* e.g. vzero */ 478 #define INSTR_VRI_V0UUU 6, { V_8,U8_16,U8_24,U4_32,0,0 } /* e.g. vgm */ 479 #define INSTR_VRI_V0UU 6, { V_8,U8_16,U8_24,0,0,0 } /* e.g. vgmb */ 480 #define INSTR_VRI_V0UU2 6, { V_8,U16_16,U4_32,0,0,0 } /* e.g. vlip */ 481 #define INSTR_VRI_VVUU 6, { V_8,V_12,U16_16,U4_32,0,0 } /* e.g. vrep */ 482 #define INSTR_VRI_VVU 6, { V_8,V_12,U16_16,0,0,0 } /* e.g. vrepb *     [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	124 #define V_8 (FE_32 + 1) /* Vector reg. starting at position 8 */ 126 #define V_12 (V_8 + 1) /* Vector reg. starting at position 12 */ 475 #define INSTR_VRV_VVXRDU 6, { V_8,D_20,VX_12,B_16,U4_32,0 } /* e.g. vgef */ 476 #define INSTR_VRI_V0U 6, { V_8,U16_16,0,0,0,0 } /* e.g. vgbm */ 477 #define INSTR_VRI_V 6, { V_8,0,0,0,0,0 } /* e.g. vzero */ 478 #define INSTR_VRI_V0UUU 6, { V_8,U8_16,U8_24,U4_32,0,0 } /* e.g. vgm */ 479 #define INSTR_VRI_V0UU 6, { V_8,U8_16,U8_24,0,0,0 } /* e.g. vgmb */ 480 #define INSTR_VRI_V0UU2 6, { V_8,U16_16,U4_32,0,0,0 } /* e.g. vlip */ 481 #define INSTR_VRI_VVUU 6, { V_8,V_12,U16_16,U4_32,0,0 } /* e.g. vrep */ 482 #define INSTR_VRI_VVU 6, { V_8,V_12,U16_16,0,0,0 } /* e.g. vrepb *     [all...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	124 #define V_8 (FE_32 + 1) /* Vector reg. starting at position 8 */ 126 #define V_12 (V_8 + 1) /* Vector reg. starting at position 12 */ 475 #define INSTR_VRV_VVXRDU 6, { V_8,D_20,VX_12,B_16,U4_32,0 } /* e.g. vgef */ 476 #define INSTR_VRI_V0U 6, { V_8,U16_16,0,0,0,0 } /* e.g. vgbm */ 477 #define INSTR_VRI_V 6, { V_8,0,0,0,0,0 } /* e.g. vzero */ 478 #define INSTR_VRI_V0UUU 6, { V_8,U8_16,U8_24,U4_32,0,0 } /* e.g. vgm */ 479 #define INSTR_VRI_V0UU 6, { V_8,U8_16,U8_24,0,0,0 } /* e.g. vgmb */ 480 #define INSTR_VRI_V0UU2 6, { V_8,U16_16,U4_32,0,0,0 } /* e.g. vlip */ 481 #define INSTR_VRI_VVUU 6, { V_8,V_12,U16_16,U4_32,0,0 } /* e.g. vrep */ 482 #define INSTR_VRI_VVU 6, { V_8,V_12,U16_16,0,0,0 } /* e.g. vrepb *     [all...]

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Indexes created Wed Mar 04 05:31:52 UTC 2026