| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/Utils/ |
| BypassSlowDivision.h | 42 static bool isEqual(const DivRemMapKey &Val1, const DivRemMapKey &Val2) {
43 return Val1.SignedOp == Val2.SignedOp && Val1.Dividend == Val2.Dividend &&
44 Val1.Divisor == Val2.Divisor;
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CGAtomic.cpp | 367 Address Val1, Address Val2,
373 llvm::Value *Expected = CGF.Builder.CreateLoad(Val1);
403 CGF.Builder.CreateStore(Old, Val1);
417 Address Val1, Address Val2,
448 emitAtomicCmpXchg(CGF, E, IsWeak, Dest, Ptr, Val1, Val2, Size, SuccessOrder,
473 emitAtomicCmpXchg(CGF, E, IsWeak, Dest, Ptr, Val1, Val2,
478 emitAtomicCmpXchg(CGF, E, IsWeak, Dest, Ptr, Val1, Val2, Size, SuccessOrder,
483 emitAtomicCmpXchg(CGF, E, IsWeak, Dest, Ptr, Val1, Val2, Size, SuccessOrder,
513 Address Ptr, Address Val1, Address Val2,
528 emitAtomicCmpXchgFailureSet(CGF, E, false, Dest, Ptr, Val1, Val2
[all...] |
| CGBuiltin.cpp | 7428 Value *Val1 = Builder.CreateExtractValue(Val, 0);
7430 Val1 = Builder.CreateZExt(Val1, Int64Ty);
7434 Val = Builder.CreateOr(Val, Val1);
9356 Value *Val1 = Builder.CreateExtractValue(Val, 0);
9359 Val1 = Builder.CreateZExt(Val1, Int128Ty);
9363 Val = Builder.CreateOr(Val, Val1);
|
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| GTestChecker.cpp | 116 static ProgramStateRef assumeValuesEqual(SVal Val1, SVal Val2,
270 ProgramStateRef GTestChecker::assumeValuesEqual(SVal Val1, SVal Val2,
273 if (!Val1.getAs<DefinedOrUnknownSVal>() ||
278 C.getSValBuilder().evalEQ(State, Val1.castAs<DefinedOrUnknownSVal>(),
|
| MismatchedIteratorChecker.cpp | 39 void reportBug(const StringRef &Message, const SVal &Val1,
279 const SVal &Val1,
285 R->markInteresting(Val1);
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 377 Value *Val1 = getRandomValue(Val0->getType());
381 Val1->getType()->isPointerTy())
410 PT->push_back(BinaryOperator::Create(Op, Val0, Val1, "B", Term));
501 Value *Val1 = getRandomValue(Val0->getType());
517 Value *V = new ShuffleVectorInst(Val0, Val1, Mask, "Shuff",
529 Value *Val1 = getRandomValue(Val0->getType()->getScalarType());
532 Val0, Val1,
629 Value *Val1 = getRandomValue(Val0->getType());
642 Value *V = SelectInst::Create(Cond, Val0, Val1, "Sl", BB->getTerminator());
653 Value *Val1 = getRandomValue(Val0->getType())
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPURegBankCombiner.cpp | 55 Register Val0, Val1, Val2;
138 {MatchInfo.Val0, MatchInfo.Val1, MatchInfo.Val2}, MI.getFlags());
|
| AMDGPUInstCombineIntrinsic.cpp | 371 APFloat Val1 = C1->getValueAPF();
373 Val1.convert(HalfSem, APFloat::rmTowardZero, &LosesInfo);
377 ConstantFP::get(II.getContext(), Val1)});
|
| /src/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| LLParser.cpp | 3654 Constant *Val0, *Val1;
3660 parseGlobalTypeAndValue(Val1) || parseIndexList(Indices) ||
3669 if (IndexedType != Val1->getType())
3671 getTypeString(Val1->getType()) +
3674 ID.ConstantVal = ConstantExpr::getInsertValue(Val0, Val1, Indices);
3681 Constant *Val0, *Val1;
3687 parseGlobalTypeAndValue(Val1) ||
3691 if (Val0->getType() != Val1->getType())
3699 ID.ConstantVal = ConstantExpr::getFCmp(Pred, Val0, Val1);
3705 ID.ConstantVal = ConstantExpr::getICmp(Pred, Val0, Val1);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 3071 SDValue Val1 = Ins1.getOperand(1);
3073 if (Val1.getOpcode() == ISD::FP_ROUND || Val2.getOpcode() == ISD::FP_ROUND)
3077 if ((Val1.getOpcode() == ISD::EXTRACT_VECTOR_ELT ||
3078 Val1.getOpcode() == ARMISD::VGETLANEu) &&
3081 isa<ConstantSDNode>(Val1.getOperand(1)) &&
3083 (Val1.getOperand(0).getValueType() == MVT::v8f16 ||
3084 Val1.getOperand(0).getValueType() == MVT::v8i16) &&
3087 unsigned ExtractLane1 = Val1.getConstantOperandVal(1);
3092 if (Val1.getOperand(0) == Val2.getOperand(0) && ExtractLane2 % 2 == 0 &&
3095 ARM::ssub_0 + ExtractLane2 / 2, dl, MVT::f32, Val1.getOperand(0))
[all...] |
| ARMBaseInstrInfo.h | 846 /// Returns true if Val1 has a lower Constant Materialization Cost than Val2.
849 bool HasLowerConstantMaterializationCost(unsigned Val1, unsigned Val2,
|
| ARMBaseInstrInfo.cpp | 5544 bool llvm::HasLowerConstantMaterializationCost(unsigned Val1, unsigned Val2,
5548 unsigned Cost1 = ConstantMaterializationCost(Val1, Subtarget, ForCodesize);
5556 return ConstantMaterializationCost(Val1, Subtarget, !ForCodesize) <
|
| ARMISelLowering.cpp | 5077 int64_t Val1 = cast<ConstantSDNode>(K1)->getSExtValue();
5079 int64_t PosVal = std::max(Val1, Val2);
5080 int64_t NegVal = std::min(Val1, Val2);
5082 if (!((Val1 > Val2 && isLTorLE(CC1)) || (Val1 < Val2 && isLTorLE(CC2))) ||
5091 if (Val1 == ~Val2)
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ProfileData/ |
| InstrProf.h | 644 static inline double score(uint64_t Val1, uint64_t Val2, double Sum1,
648 return std::min(Val1 / Sum1, Val2 / Sum2);
|
| /src/external/apache2/llvm/dist/clang/lib/AST/ |
| ASTStructuralEquivalence.cpp | 1632 llvm::APSInt Val1 = EC1->getInitVal();
1634 if (!llvm::APSInt::isSameValue(Val1, Val2) ||
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 12558 /// <tt>(or (shl VAL1, \#N), (srl VAL2, \#RegWidth-N))</tt> and replaces it
12693 // Attempt to form an EXTR from (or (shl VAL1, #N), (srl VAL2, #RegWidth-N))
13435 SDValue Val1 = Op1.getOperand(0);
13437 EVT ValVT = Val1->getValueType(0);
13439 SDValue AddVal = DAG.getNode(ISD::ADD, DL, ValVT, Val1, Val2);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
