Searched refs:WR2 (Results 1 - 6 of 6) sorted by relevance

/src/sys/arch/luna68k/dev/
H A Dsioreg.h75 #define WR2 0x02 macro
82 #define WR2A WR2 /* on channel A */
83 #define WR2B WR2 /* on channel B */
/src/sys/arch/evbppc/wii/dev/
H A Davenc.c59 #define WR2 avenc_write_2 macro
162 WR2(avenc_tag, avenc_addr, AVENC_VOLUME, val);
210 WR2(tag, addr, 0x05, 0);
211 WR2(tag, addr, 0x08, 0);
219 WR2(tag, addr, 0x08, 0);
H A Dwiifb.c159 #define WR2(sc, reg, val) \ macro
710 WR2(sc, VI_DCR, VI_DCR_RST);
716 WR2(sc, VI_DCR, dcr);
728 WR2(sc, VI_VTR, 0x0f06);
735 WR2(sc, VI_DPV, 0x0000);
736 WR2(sc, VI_DPH, 0x0000);
739 WR2(sc, VI_VTR, 0x1e0c);
746 WR2(sc, VI_DPV, 0x0000);
747 WR2(sc, VI_DPH, 0x0000);
750 WR2(s
[all...]
H A Dbwdsp.c83 #define WR2(sc, reg, val) \ macro
254 WR2(sc, DSP_DMA_START_ADDR_H, phys_addr >> 16);
255 WR2(sc, DSP_DMA_START_ADDR_L, phys_addr & 0xffff);
256 WR2(sc, DSP_DMA_CONTROL_LENGTH,
259 WR2(sc, DSP_DMA_CONTROL_LENGTH, 0);
/src/sys/arch/luna68k/stand/boot/
H A Dsioreg.h94 #define WR2 0x02 macro
/src/sys/arch/arm/ti/
H A Dti_omapmusb.c81 #define WR2(sc, reg, val) \ macro
109 WR2(sc, MUSB2_REG_INTTX, inttx);
111 WR2(sc, MUSB2_REG_INTRX, intrx);

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