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    Searched refs:WR5 (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/arch/luna68k/stand/boot/
sio.c 230 sioreg(REG(0, WR5), WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS);
246 sioreg(REG(1, WR5), WR5_TX8BIT | WR5_TXENBL);
sioreg.h 97 #define WR5 0x05
  /src/sys/arch/luna68k/dev/
sioreg.h 78 #define WR5 0x05
siotty.c 195 setsioreg(sc->sc_ctl, WR5, sc->sc_wr[WR5]);
432 sc->sc_wr[WR5] &= ~WR5_TX8BIT;
436 sc->sc_wr[WR5] |= WR5_TX7BIT;
440 sc->sc_wr[WR5] |= WR5_TX8BIT;
454 setsioreg(sc->sc_ctl, WR5, sc->sc_wr[WR5]);
464 uint8_t wr5; local
475 wr5 = sc->sc_wr[WR5];
    [all...]
lunaws.c 235 setsioreg(sc->sc_ctl, WR5, sc->sc_wr[WR5]);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/Disassembler/
HexagonDisassembler.cpp 615 Hexagon::W5, Hexagon::WR5, Hexagon::W6, Hexagon::WR6, Hexagon::W7,

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