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    Searched refs:WRPLL_CTL (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.c 514 I915_WRITE(WRPLL_CTL(id), pll->state.hw_state.wrpll);
515 POSTING_READ(WRPLL_CTL(id));
533 val = I915_READ(WRPLL_CTL(id));
534 I915_WRITE(WRPLL_CTL(id), val & ~WRPLL_PLL_ENABLE);
535 POSTING_READ(WRPLL_CTL(id));
576 val = I915_READ(WRPLL_CTL(id));
981 .ctl = WRPLL_CTL(0),
987 .ctl = WRPLL_CTL(1),
intel_ddi.c 1692 link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL(0));
1695 link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL(1));
intel_display_power.c 4526 I915_STATE_WARN(I915_READ(WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
4528 I915_STATE_WARN(I915_READ(WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
intel_display.c 9775 u32 ctl = I915_READ(WRPLL_CTL(id));
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_reg.h 9848 #define WRPLL_CTL(pll) _MMIO_PIPE(pll, _WRPLL_CTL1, _WRPLL_CTL2)

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