| /src/sys/arch/amiga/dev/ |
| ite_rt.c | 174 WSeq (ba, SEQ_ID_EXTENDED_MEM_ENA,
177 WSeq (ba, SEQ_ID_EXT_VIDEO_ADDR, RSeq(ba, SEQ_ID_EXT_VIDEO_ADDR) & ~0x02);
187 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, ((unsigned char)toploc));
188 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, ((unsigned char)(toploc >> 8)));
193 WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, ((unsigned char)fromloc)) ;
194 WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, ((unsigned char)(fromloc >> 8))) ;
221 WSeq (ba, SEQ_ID_SEC_HOST_OFF_HI, 0);
222 WSeq (ba, SEQ_ID_SEC_HOST_OFF_LO, 0);
223 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, 0);
224 WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, 0)
[all...] |
| grf_rt.c | 359 WSeq (ba, SEQ_ID_EXTENDED_ENABLE, 0x05);
369 WSeq (ba, SEQ_ID_RESET, 0x03);
371 WSeq (ba, SEQ_ID_CLOCKING_MODE, 0x01 | ((md->FLG & MDF_CLKDIV2)/ MDF_CLKDIV2 * 8));
372 WSeq (ba, SEQ_ID_MAP_MASK, 0x0f);
373 WSeq (ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
375 WSeq (ba, SEQ_ID_MEMORY_MODE, 0x06);
377 WSeq (ba, SEQ_ID_RESET, 0x01);
378 WSeq (ba, SEQ_ID_RESET, 0x03);
380 WSeq (ba, SEQ_ID_RESET, 0x01);
383 WSeq (ba, SEQ_ID_EXT_CLOCK_MODE, 0x30 | (FW & 0x0f) | ((clksel & 4) / 4 * 0x40) )
[all...] |
| grf_rh.c | 156 WSeq(ba, SEQ_ID_CURSOR_Y_INDEX, 0x00);
181 WSeq(ba, SEQ_ID_CURSOR_COLOR1, col1);
182 WSeq(ba, SEQ_ID_CURSOR_COLOR0, col2);
185 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x85);
187 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x03);
192 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xa5);
194 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x23);
199 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0xc5);
201 WSeq(ba, SEQ_ID_CURSOR_CONTROL, 0x43);
204 WSeq(ba, SEQ_ID_CURSOR_X_LOC_HI, 0x00)
[all...] |
| grf_cl.c | 559 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot - display off */
563 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12); /* yum! cookies! */
566 WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
567 WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
569 WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
571 WSeq(ba, SEQ_ID_RESET, 0x03);
572 WSeq(ba, SEQ_ID_MAP_MASK, 0xff);
573 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
574 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e); /* a or 6? */
575 WSeq(ba, SEQ_ID_EXT_SEQ_MODE, (cltype == PICASSO) ? 0x21 : 0x81)
[all...] |
| grf_et.c | 496 WSeq(ba, SEQ_ID_RESET, 0x03);
497 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21); /* 8 dot, Display off */
498 WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
499 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
500 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
501 WSeq(ba, SEQ_ID_STATE_CONTROL, 0x00);
502 WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
684 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
693 WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, on > 0 ? 0x01 : 0x21);
1233 WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e)
[all...] |
| grf_cv3d.c | 617 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x06); /* Unlock extensions */
629 WSeq(ba, SEQ_ID_RESET, 0x03);
631 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); /* 8 Dot Clock */
632 WSeq(ba, SEQ_ID_MAP_MASK, 0x0F); /* Enable write planes */
633 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); /* Character Font */
635 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x02); /* Complete mem access */
636 WSeq(ba, SEQ_ID_MMIO_SELECT, 0x00);
642 WSeq(ba, SEQ_ID_BUS_REQ_CNTL, test);
646 WSeq(ba, SEQ_ID_RAMDAC_CNTL, 0xC0);
648 WSeq(ba, SEQ_ID_UNKNOWN6, 0x00)
[all...] |
| grf_cv.c | 690 WSeq(ba, SEQ_ID_RESET, 0x03);
692 WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01); /* 8 Dot Clock */
693 WSeq(ba, SEQ_ID_MAP_MASK, 0x0f); /* Enable write planes */
694 WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00); /* Character Font */
696 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x02); /* Complete mem access */
698 WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x06); /* Unlock extensions */
703 WSeq(ba, SEQ_ID_BUS_REQ_CNTL, test);
705 WSeq(ba, SEQ_ID_RAMDAC_CNTL, 0xC0);
716 WSeq(ba, SEQ_ID_CLKSYN_CNTL_2, test);
721 WSeq(ba, SEQ_ID_MCLK_HI, test); /* PLL N-Divider Value *
[all...] |
| grf_clreg.h | 199 #define SEQ_ID_CURSOR_X 0x10 /* Cursor position can't be set with WSeq
279 #define WSeq(ba, idx, val) \
303 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); \
|
| grf_etreg.h | 268 #define WSeq(ba, idx, val) \
287 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); \
|
| grf_rtreg.h | 493 #define WSeq(ba, idx, val) \
503 do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0)
|
| grf_cvreg.h | 347 #define WSeq(ba, idx, val) \
366 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
|
| grf_rhreg.h | 637 #define WSeq(ba, idx, val) \
647 do { WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 ); WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3))); } while (0)
|
| grf_cv3dreg.h | 536 #define WSeq(ba, idx, val) \
555 WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
|
| /src/sys/arch/atari/pci/ |
| pci_vga.c | 303 WSeq(ba, SEQ_ID_MAP_MASK, 0x04);
304 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x06);
327 WSeq(ba, SEQ_ID_MAP_MASK, 0x03);
328 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x03);
|
| pci_tseng.c | 123 WSeq(ba, SEQ_ID_RESET , 0x00);
129 WSeq(ba, i, seq_tab[i]);
130 WSeq(ba, SEQ_ID_RESET , 0x03);
|
| pci_hades.c | 249 WSeq(ba, i, seq_tab[i]);
|
| /src/sys/arch/atari/dev/ |
| grfabs_et.c | 691 WSeq(ba, SEQ_ID_RESET, 0x01);
693 WSeq(ba, i, et_regs->seq[i]);
694 WSeq(ba, SEQ_ID_RESET, 0x03);
711 WSeq(ba, SEQ_ID_STATE_CONTROL, et_regs->state_ctl);
712 WSeq(ba, SEQ_ID_AUXILIARY_MODE, et_regs->aux_mode);
720 WSeq(ba, SEQ_ID_CLOCKING_MODE, i);
|
| grf_etreg.h | 192 #define WSeq(ba, idx, val) \
|
| ite_et.c | 619 WSeq(ba, SEQ_ID_MAP_MASK, 0x04);
620 WSeq(ba, SEQ_ID_MEMORY_MODE, 0x06);
|
