| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/scryptsalsa208sha256/sse/ |
| pwhash_scryptsalsa208sha256_sse.c | 67 ARX(X1, X0, X3, 7) \
68 ARX(X2, X1, X0, 9) \
70 ARX(X0, X3, X2, 18) \
78 ARX(X3, X0, X1, 7) \
79 ARX(X2, X3, X0, 9) \
81 ARX(X0, X1, X2, 18) \
89 * Apply the salsa20/8 core to the block provided in (X0 ... X3) ^ (Z0 ... Z3).
93 __m128i Y0 = X0 = _mm_xor_si128(X0, (in)[0]); \
100 SALSA20_2ROUNDS(out)[0] = X0 = _mm_add_epi32(X0, Y0);
[all...] |
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_aead/aes256gcm/aesni/ |
| aead_aes256gcm_aesni.c | 62 __m128i X0, X1, X2, X3;
65 X0 = _mm_loadu_si128((const __m128i *) &key[0]);
66 rkeys[i++] = X0;
73 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X0), 0x10)); \
74 X0 = _mm_xor_si128(X0, X3); \
75 X3 = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(X3), _mm_castsi128_ps(X0), 0x8c)); \
76 X0 = _mm_xor_si128(_mm_xor_si128(X0, X3), X1); \
77 rkeys[i++] = X0; \
[all...] |
| /src/sys/external/bsd/compiler_rt/dist/lib/xray/ |
| xray_mips.cc | 31 PO_NOP = 0x0, // nop
107 PatchOpcodes::PO_SW, RegNum::RN_SP, RegNum::RN_T9, 0x0);
109 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, HiTracingHookAddr);
113 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, HiFunctionID);
115 PatchOpcodes::PO_JALR, RegNum::RN_T9, 0x0, RegNum::RN_RA, 0X0);
119 PatchOpcodes::PO_LW, RegNum::RN_SP, RegNum::RN_T9, 0x0);
|
| xray_mips64.cc | 32 PO_NOP = 0x0, // nop
107 PatchOpcodes::PO_SD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
109 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, HighestTracingHookAddr);
114 PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
118 PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
122 PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, HiFunctionID);
124 PatchOpcodes::PO_JALR, RegNum::RN_T9, 0x0, RegNum::RN_RA, 0X0);
128 PatchOpcodes::PO_LD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
|
| /src/sys/dev/i2c/ |
| sensirion_voc_algorithm.c | 313 VocAlgorithmParams* params, fix16_t L, fix16_t X0, fix16_t K);
663 VocAlgorithmParams* params, fix16_t L, fix16_t X0, fix16_t K) {
667 params->m_Mean_Variance_Estimator___Sigmoid__X0 = X0;
|
| /src/tests/usr.bin/printf/ |
| printf.sh | 1144 expect 0x0.p+0 '%#.0a' 0
1145 expect 0x0.000p+0 '%.3a' 0
1161 expect_fail 0x0.p+0 %#a trash
1179 expect 0X0.P+0 '%#.0A' 0
1180 expect 0X0.000P+0 '%.3A' 0
1193 expect_fail 0X0.P+0 %#A trash
1604 for fmt in '\x0' '\x00'
|
| /src/sys/arch/m68k/060sp/dist/ |
| ilsp.s | 77 # and therefore does not work exactly like the 680X0 div{s,u}.l #
122 # fmovm.l &0x0,-(%sp) # save no fpregs
137 # fmovm.l &0x0,-(%sp) # save no fpregs
169 mov.w &0x0, %cc # clear 'X' cc bit
244 # fmovm.l (%sp)+,&0x0 # restore no fpregs
269 # fmovm.l (%sp)+,&0x0 # restore no fpregs
274 divu.w &0x0,%d0 # force a divbyzero exception
494 # and therefore does not work exactly like the 680X0 mul{s,u}.l #
524 # fmovm.l &0x0,-(%sp) # save no fpregs
606 # fmovm.l (%sp)+,&0x0 # restore no fpreg
[all...] |
| /src/sbin/nvmectl/ |
| bignum.c | 120 memset(a->dp, 0x0, a->alloc * sizeof(*a->dp));
149 memset(&a->dp[a->alloc], 0x0, (size - a->alloc) * sizeof(*a->dp));
192 memset(a->dp, 0x0, b * sizeof(*a->dp));
241 memset(&b->dp[a->used], 0x0, (b->used - a->used) * sizeof(*b->dp));
432 memset(a->dp, 0x0, MP_PREC * sizeof(*a->dp));
449 memset(a->dp, 0x0, a->used * sizeof(*a->dp));
517 memset(a->dp, 0x0, size * sizeof(*a->dp));
613 memset(tmpc, 0x0, (olduse - c->used) * sizeof(*c->dp));
680 memset(tmpc, 0x0, (olduse - c->used) * sizeof(*a->dp));
751 memset(&a->dp[a->used - b], 0x0, b * sizeof(*a->dp))
2097 mp_int x0, x1, y0, y1, t1, x0y0, x1y1; local
2942 mp_int x0, x1, t1, t2, x0x0, x1x1; local
[all...] |
| /src/sys/dev/pci/ixgbe/ |
| ixgbe_type.h | 843 #define IXGBE_LSECTXCTRL_DISABLE 0x0
852 #define IXGBE_LSECRXCTRL_DISABLE 0x0
1599 #define IXGBE_MDIO_ZERO_DEV_TYPE 0x0
1609 #define IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL 0x0 /* VS1 Ctrl Reg */
1616 #define IXGBE_MDIO_AUTO_NEG_CONTROL 0x0 /* AUTO_NEG Control Reg */
1628 #define IXGBE_MDIO_PHY_XS_CONTROL 0x0 /* PHY_XS Control Reg */
1691 #define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_HALF 0x0 /* 10Mb/s Half Duplex */
1716 #define IXGBE_MII_AUTONEG_REG 0x0
2209 #define IXGBE_LED_LINK_UP 0x0
2242 #define IXGBE_AUTOC_LMS_1G_LINK_NO_AN (0x0 << IXGBE_AUTOC_LMS_SHIFT
[all...] |
