HomeSort by: relevance | last modified time | path
    Searched refs:X4 (Results 1 - 25 of 37) sorted by relevancy

1 2

  /src/sys/external/bsd/compiler_rt/dist/lib/xray/
xray_trampoline_AArch64.S 22 STP X3, X4, [SP, #-16]!
49 LDP X3, X4, [SP], #16
69 STP X3, X4, [SP, #-16]!
89 LDP X3, X4, [SP], #16
109 STP X3, X4, [SP, #-16]!
140 LDP X3, X4, [SP], #16
  /src/external/gpl3/gcc.old/dist/libstdc++-v3/include/ext/
typelist.h 363 #define _GLIBCXX_TYPELIST_CHAIN5(X0, X1, X2, X3, X4) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN4(X1, X2, X3, X4) >
364 #define _GLIBCXX_TYPELIST_CHAIN6(X0, X1, X2, X3, X4, X5) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN5(X1, X2, X3, X4, X5) >
365 #define _GLIBCXX_TYPELIST_CHAIN7(X0, X1, X2, X3, X4, X5, X6) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN6(X1, X2, X3, X4, X5, X6) >
366 #define _GLIBCXX_TYPELIST_CHAIN8(X0, X1, X2, X3, X4, X5, X6, X7) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN7(X1, X2, X3, X4, X5, X6, X7) >
367 #define _GLIBCXX_TYPELIST_CHAIN9(X0, X1, X2, X3, X4, X5, X6, X7, X8) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN8(X1, X2, X3, X4, X5, X6, X7, X8)
    [all...]
  /src/external/gpl3/gcc/dist/libstdc++-v3/include/ext/
typelist.h 363 #define _GLIBCXX_TYPELIST_CHAIN5(X0, X1, X2, X3, X4) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN4(X1, X2, X3, X4) >
364 #define _GLIBCXX_TYPELIST_CHAIN6(X0, X1, X2, X3, X4, X5) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN5(X1, X2, X3, X4, X5) >
365 #define _GLIBCXX_TYPELIST_CHAIN7(X0, X1, X2, X3, X4, X5, X6) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN6(X1, X2, X3, X4, X5, X6) >
366 #define _GLIBCXX_TYPELIST_CHAIN8(X0, X1, X2, X3, X4, X5, X6, X7) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN7(X1, X2, X3, X4, X5, X6, X7) >
367 #define _GLIBCXX_TYPELIST_CHAIN9(X0, X1, X2, X3, X4, X5, X6, X7, X8) __gnu_cxx::typelist::chain<X0, _GLIBCXX_TYPELIST_CHAIN8(X1, X2, X3, X4, X5, X6, X7, X8)
    [all...]
  /src/sys/arch/ia64/unwind/
decode.c 329 uwd->X4.qp = (buf[1] & 0x3f);
330 uwd->X4.x = ((buf[2] & 0x80) == 0x80);
331 uwd->X4.a = ((buf[2] & 0x40) == 0x40);
332 uwd->X4.b = ((buf[2] & 0x20) == 0x20);
333 uwd->X4.reg = (buf[2] & 0x1f);
334 uwd->X4.y = ((buf[3] & 0x80) == 0x80);
335 uwd->X4.treg = (buf[3] & 0x7f);
338 buf = unwind_decode_ule128(buf, &uwd->X4.t);
decode.h 39 #define R2MASKPFS 0x4
186 struct unwind_desc_X4 X4;
193 X1, X2, X3, X4
stackframe.c 244 strc[rec_cnt].type = X4;
605 case X4:
1083 case X4:
  /src/sys/arch/sparc/fpu/
fpu.c 94 #define X4(x) x,x,x,x
95 #define X8(x) X4(x),X4(x)
101 X4(FSR_UF),
108 X4(FPE_FLTUND),
115 X4(FPE_FLTUND_TRAP),
  /src/sys/arch/sandpoint/
README 9 8240 PMC rev X4 installed. It also works with the Altimus X2 PMC
21 This port was developed on a Sandpoint X2 motherboard with a Unity X4 PMC.
122 IRQ4 - pulled down w/ resistor (Unity X4)
  /src/external/gpl3/gdb/dist/sim/testsuite/bfin/
lmu_excpt_prot1.S 267 X4: //[p1] = r1; // Exception should occur here
275 CHECKREG_SYM(r7, X4, r0); // RETX should be value of X4 (HARDCODED ADDR!!)
lmu_excpt_prot0.S 260 X4: [ P1 ] = R1; // Exception should NOT occur here
269 CHECKREG(r7, 0); // RETX should NOT be value of X4 (HARDCODED ADDR!!)
  /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/
lmu_excpt_prot1.S 267 X4: //[p1] = r1; // Exception should occur here
275 CHECKREG_SYM(r7, X4, r0); // RETX should be value of X4 (HARDCODED ADDR!!)
lmu_excpt_prot0.S 260 X4: [ P1 ] = R1; // Exception should NOT occur here
269 CHECKREG(r7, 0); // RETX should NOT be value of X4 (HARDCODED ADDR!!)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64CallingConvention.cpp 24 AArch64::X3, AArch64::X4, AArch64::X5,
AArch64SLSHardening.cpp 153 { "__llvm_slsblr_thunk_x4", AArch64::X4},
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTLSDynamicCall.cpp 85 Register GPR4 = Is64Bit ? PPC::X4 : PPC::R4;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.h 35 case AArch64::X4: return AArch64::W4;
75 case AArch64::W4: return AArch64::X4;
240 MI = 0x4, // Minus, negative Less than
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
RISCVMCCodeEmitter.cpp 159 assert(TPReg.isReg() && TPReg.getReg() == RISCV::X4 &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVRegisterInfo.cpp 90 markSuperRegs(Reserved, RISCV::X4); // tp
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCTargetDesc.cpp 105 {codeview::RegisterId::ARM64_X4, AArch64::X4},
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
X86InstComments.cpp 1090 CASE_VSHUF(32X4, r)
1095 CASE_VSHUF(32X4, m)
  /src/external/gpl3/gcc.old/dist/libgcc/config/ia64/
unwind-ia64.c 1143 UNW_DEC_RESTORE_P(X4, qp, t, abreg, arg);
1145 UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg);
  /src/external/gpl3/gcc/dist/libgcc/config/ia64/
unwind-ia64.c 1143 UNW_DEC_RESTORE_P(X4, qp, t, abreg, arg);
1145 UNW_DEC_SPILL_REG_P(X4, qp, t, abreg, x, ytreg, arg);
  /src/external/gpl3/gcc.old/dist/libgcc/config/libbid/
bid_functions.h 136 #define X4 "%04x"
156 #define X4 "%04x"
  /src/external/gpl3/gcc.old/dist/libphobos/libdruntime/core/sys/windows/
wininet.d 142 INTERNET_ERROR_MASK_NEED_MSN_SSPI_PKG = 0X4,
  /src/external/gpl3/gcc/dist/libgcc/config/libbid/
bid_functions.h 136 #define X4 "%04x"
156 #define X4 "%04x"

Completed in 56 milliseconds

1 2