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    Searched refs:XCore (Results 1 - 18 of 18) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
XCoreInstrInfo.cpp 1 //===-- XCoreInstrInfo.cpp - XCore Instruction Information ----------------===//
9 // This file contains the XCore implementation of the TargetInstrInfo class.
14 #include "XCore.h"
34 namespace XCore {
36 // XCore Condition Codes
49 : XCoreGenInstrInfo(XCore::ADJCALLSTACKDOWN, XCore::ADJCALLSTACKUP),
65 if (Opcode == XCore::LDWFI)
85 if (Opcode == XCore::STWFI)
102 return BrOpc == XCore::BRFU_u
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XCoreRegisterInfo.cpp 1 //===-- XCoreRegisterInfo.cpp - XCore Register Information ----------------===//
9 // This file contains the XCore implementation of the MRegisterInfo class.
14 #include "XCore.h"
38 #define DEBUG_TYPE "xcore-reg-info"
44 : XCoreGenRegisterInfo(XCore::LR) {
69 case XCore::LDWFI:
70 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
75 case XCore::STWFI:
76 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
82 case XCore::LDAWFI
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XCoreMachineFunctionInfo.cpp 1 //===-- XCoreMachineFunctionInfo.cpp - XCore machine function info --------===//
38 const TargetRegisterClass &RC = XCore::GRRegsRegClass;
56 const TargetRegisterClass &RC = XCore::GRRegsRegClass;
69 const TargetRegisterClass &RC = XCore::GRRegsRegClass;
XCoreFrameLowering.cpp 1 //===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===//
9 // This file contains XCore frame information that doesn't fit anywhere else
15 #include "XCore.h"
34 static const unsigned FramePtr = XCore::R10;
106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
129 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(OpImm);
145 XCore::LR))
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XCoreISelDAGToDAG.cpp 1 //===-- XCoreISelDAGToDAG.cpp - A dag to dag inst selector for XCore ------===//
9 // This file defines an instruction selector for the XCore target.
13 #include "XCore.h"
34 /// XCoreDAGToDAGISel - XCore specific code to select XCore machine
71 return "XCore DAG->DAG Pattern Instruction Selection";
80 /// XCore-specific DAG, ready for instruction scheduling.
120 Reg = CurDAG->getRegister(XCore::CP, MVT::i32);
123 Reg = CurDAG->getRegister(XCore::DP, MVT::i32);
142 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl
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XCoreAsmPrinter.cpp 1 //===-- XCoreAsmPrinter.cpp - XCore LLVM assembly writer ------------------===//
10 // of machine-dependent LLVM code to the XAS-format XCore assembly language.
16 #include "XCore.h"
61 StringRef getPassName() const override { return "XCore Assembly Printer"; }
263 case XCore::DBG_VALUE:
265 case XCore::ADD_2rus:
274 case XCore::BR_JT:
275 case XCore::BR_JT32:
278 if (MI->getOpcode() == XCore::BR_JT)
XCoreFrameToArgsOffsetElim.cpp 13 #include "XCore.h"
35 return "XCore FRAME_TO_ARGS_OFFSET Elimination";
56 if (MBBI->getOpcode() == XCore::FRAME_TO_ARGS_OFFSET) {
XCoreISelLowering.h 1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
9 // This file defines the interfaces that XCore uses to lower LLVM code into a
17 #include "XCore.h"
131 return XCore::R0;
138 return XCore::R1;
XCoreISelLowering.cpp 1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
14 #include "XCore.h"
42 #define DEBUG_TYPE "xcore-lower"
77 addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);
82 setStackPointerRegisterToSaveRestore(XCore::SP);
90 // XCore does not have the NodeTypes below.
838 unsigned StackReg = XCore::R2;
839 unsigned HandlerReg = XCore::R3;
1028 /// XCore call implementation
1043 // XCore target does not yet support tail call optimization
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp 1 //===- XCoreDisassembler.cpp - Disassembler for XCore -----------*- C++ -*-===//
10 /// This file is part of the XCore Disassembler.
15 #include "XCore.h"
26 #define DEBUG_TYPE "xcore-disassembler"
32 /// A disassembler class for XCore.
205 unsigned Reg = getReg(Decoder, XCore::GRRegsRegClassID, RegNo);
217 unsigned Reg = getReg(Decoder, XCore::RRegsRegClassID, RegNo);
280 Inst.setOpcode(XCore::STW_2rus);
283 Inst.setOpcode(XCore::LDW_2rus);
286 Inst.setOpcode(XCore::ADD_3r)
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  /src/external/apache2/llvm/dist/clang/lib/Basic/Targets/
XCore.cpp 1 //===--- XCore.cpp - Implement XCore target feature support ---------------===//
9 // This file implements XCore TargetInfo objects.
13 #include "XCore.h"
36 return llvm::makeArrayRef(BuiltinInfo, clang::XCore::LastTSBuiltin -
  /src/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/
XCore.cpp 1 //===--- XCore.cpp - XCore ToolChain Implementations ------------*- C++ -*-===//
9 #include "XCore.h"
22 /// XCore Tools
25 void tools::XCore::Assembler::ConstructJob(Compilation &C, const JobAction &JA,
59 void tools::XCore::Linker::ConstructJob(Compilation &C, const JobAction &JA,
88 /// XCore tool chain
96 return new tools::XCore::Assembler(*this);
100 return new tools::XCore::Linker(*this);
XCore.h 1 //===--- XCore.h - XCore ToolChain Implementations --------------*- C++ -*-===//
19 namespace XCore {
20 // For XCore, we do not need to instantiate tools for PreProcess, PreCompile and
25 Assembler(const ToolChain &TC) : Tool("XCore::Assembler", "XCore-as", TC) {}
36 Linker(const ToolChain &TC) : Tool("XCore::Linker", "XCore-ld", TC) {}
45 } // end namespace XCore.
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/MCTargetDesc/
XCoreMCTargetDesc.cpp 1 //===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
9 // This file provides XCore specific target descriptions.
48 InitXCoreMCRegisterInfo(X, XCore::LR);
63 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, XCore::SP, 0);
  /src/external/apache2/llvm/lib/libclangBasic/
Makefile 72 XCore.cpp
  /src/external/apache2/llvm/lib/libclangDriver/
Makefile 70 XCore.cpp \
  /src/external/apache2/llvm/dist/clang/include/clang/Basic/
TargetBuiltins.h 293 /// XCore builtins
294 namespace XCore {
327 Hexagon::LastTSBuiltin, Mips::LastTSBuiltin, XCore::LastTSBuiltin,
  /src/external/apache2/llvm/autoconf/
configure 1558 hexagon, xcore, msp430, nvptx, systemz, r600, bpf,
4245 xcore-*) llvm_cv_target_arch="XCore" ;;
4284 xcore-*) host_arch="XCore" ;;
5034 XCore) TARGET_HAS_JIT=0
5420 ALL_TARGETS="AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 NVPTX PowerPC Sparc SystemZ X86 XCore"
5451 xcore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;;
5468 XCore) TARGETS_TO_BUILD="XCore $TARGETS_TO_BUILD" ;
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