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    Searched refs:XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/arch/arm/nvidia/
tegra124_xusbpadreg.h 161 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL __BITS(1,0)
tegra124_xusbpad.c 217 __SHIFTIN(hsl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL) |
220 XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL |

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