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Searched refs:XUSB_PADCTL_USB2_BIAS_PAD_CTL0_REG (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra124_xusbpad.c	`216 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_REG, 313 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_REG, 0, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD); 314 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_REG, 0, XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD_TRK);`
tegra124_xusbpadreg.h	`78 #define XUSB_PADCTL_USB2_BIAS_PAD_CTL0_REG 0x0b8`

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