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Searched refs:XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra124_xusbpad.c	`238 XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG, 302 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD); 305 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2); 308 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD_ZI);`
tegra124_xusbpadreg.h	`73 #define XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG 0x0a4`

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