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Searched refs:XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/arm/nvidia/
tegra124_xusbpad.c	`235 XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2 \| 249 XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2 \| 263 XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2 \| 304 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD0_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2); 305 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD1_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2); 306 tegra_reg_set_clear(sc->sc_bst, sc->sc_bsh, XUSB_PADCTL_USB2_OTG_PAD2_CTL0_REG, 0, XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2);`
tegra124_xusbpadreg.h	`143 #define XUSB_PADCTL_USB2_OTG_PAD_CTL0_PD2 __BIT(20)`

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