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Searched refs:X_12 (Results 1 - 4 of 4) sorted by relevancy

/src/external/gpl3/binutils/dist/opcodes/
s390-opc.c	160 #define X_12 (B_32 + 1) /* Index register starting at position 12 / 163 #define VX_12 (X_12+1) / Vector index register starting at position 12 / 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } / e.g. adb / 435 #define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } / e.g. lxdb / 436 #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } / e.g. lg / 437 #define INSTR_RXE_RRRDU 6, { R_8,D_20,X_12,B_16,U4_32,0 } / e.g. lcbb / 438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } / e.g. dsg / 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } / e.g. madb / 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } / e.g. my / 441 #define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } / e.g. slxt * [all...]
/src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c	160 #define X_12 (B_32 + 1) /* Index register starting at position 12 / 163 #define VX_12 (X_12+1) / Vector index register starting at position 12 / 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } / e.g. adb / 435 #define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } / e.g. lxdb / 436 #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } / e.g. lg / 437 #define INSTR_RXE_RRRDU 6, { R_8,D_20,X_12,B_16,U4_32,0 } / e.g. lcbb / 438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } / e.g. dsg / 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } / e.g. madb / 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } / e.g. my / 441 #define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } / e.g. slxt * [all...]
/src/external/gpl3/gdb/dist/opcodes/
s390-opc.c	160 #define X_12 (B_32 + 1) /* Index register starting at position 12 / 163 #define VX_12 (X_12+1) / Vector index register starting at position 12 / 434 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } / e.g. adb / 435 #define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } / e.g. lxdb / 436 #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } / e.g. lg / 437 #define INSTR_RXE_RRRDU 6, { R_8,D_20,X_12,B_16,U4_32,0 } / e.g. lcbb / 438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } / e.g. dsg / 439 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } / e.g. madb / 440 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } / e.g. my / 441 #define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } / e.g. slxt * [all...]
/src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c	158 #define X_12 (B_32 + 1) /* Index register starting at position 12 / 161 #define VX_12 (X_12+1) / Vector index register starting at position 12 / 444 #define INSTR_RXE_FRRD 6, { F_8,D_20,X_12,B_16,0,0 } / e.g. adb / 445 #define INSTR_RXE_FERRD 6, { FE_8,D_20,X_12,B_16,0,0 } / e.g. lxdb / 446 #define INSTR_RXE_RRRD 6, { R_8,D_20,X_12,B_16,0,0 } / e.g. lg / 447 #define INSTR_RXE_RRRDU 6, { R_8,D_20,X_12,B_16,U4_32,0 } / e.g. lcbb / 448 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } / e.g. dsg / 449 #define INSTR_RXF_FRRDF 6, { F_32,F_8,D_20,X_12,B_16,0 } / e.g. madb / 450 #define INSTR_RXF_FRRDFE 6, { FE_32,F_8,D_20,X_12,B_16,0 } / e.g. my / 451 #define INSTR_RXF_FERRDFE 6, { FE_32,FE_8,D_20,X_12,B_16,0 } / e.g. slxt * [all...]

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