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    Searched refs:ZSRR0_TX_READY (Results 1 - 23 of 23) sorted by relevancy

  /src/sys/arch/ews4800mips/stand/common/
cons_zs.c 135 } while ((csr & ZSRR0_TX_READY) == 0);
  /src/sys/arch/cobalt/stand/boot/
zs.c 144 } while ((csr & ZSRR0_TX_READY) == 0);
  /src/sys/arch/ews4800mips/dev/
zs.c 293 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/sgimips/stand/common/
iris_zs.c 199 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/mipsco/obio/
zs.c 403 while (!(zs_read_csr(cs) & ZSRR0_TX_READY))
615 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/dev/ic/
z8530reg.h 390 #define ZSRR0_TX_READY 0x04 /* transmit buffer empty */
  /src/sys/arch/newsmips/dev/
zs_hb.c 363 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/dev/tc/
zs_ioasic.c 680 } while ((rr0 & ZSRR0_TX_READY) == 0);
687 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/mac68k/dev/
zs.c 982 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
984 if ((rr0 & ZSRR0_TX_READY) != 0) {
  /src/sys/arch/sgimips/dev/
zs.c 454 while (!(zs_read_csr(cs) & ZSRR0_TX_READY))
725 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/cesfic/dev/
zs.c 400 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/cobalt/dev/
zs.c 491 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/news68k/dev/
zs.c 520 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/mvme68k/dev/
zs.c 484 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/ews4800mips/sbd/
kbms_sbdio.c 366 while ((*csr & ZSRR0_TX_READY) == 0)
  /src/sys/arch/newsmips/apbus/
zs_ap.c 504 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/x68k/dev/
zs.c 568 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/next68k/dev/
zs.c 568 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/sun2/dev/
zs.c 620 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/sun3/dev/
zs.c 611 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/macppc/dev/
zs.c 916 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
918 if ((rr0 & ZSRR0_TX_READY) != 0) {
  /src/sys/arch/sparc/dev/
zs.c 874 } while ((rr0 & ZSRR0_TX_READY) == 0);
  /src/sys/arch/sparc64/dev/
zs.c 782 } while ((rr0 & ZSRR0_TX_READY) == 0);

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