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    Searched refs:Zext (Results 1 - 12 of 12) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombinePHI.cpp 763 // Find the narrower type specified by the first zext.
766 if (auto *Zext = dyn_cast<ZExtInst>(V)) {
767 NarrowType = Zext->getSrcTy();
780 if (auto *Zext = dyn_cast<ZExtInst>(V)) {
782 if (Zext->getSrcTy() != NarrowType || !Zext->hasOneUser())
784 NewIncoming.push_back(Zext->getOperand(0));
810 // operands, and zext the result back to the original type.
InstCombineCasts.cpp 183 C = ConstantExpr::getIntegerCast(C, Ty, isSigned /*Sext or ZExt*/);
210 case Instruction::ZExt:
219 // This also handles the case of zext(trunc(x)) -> zext(x).
446 case Instruction::ZExt:
599 // from 'zext', 'and' or 'shift'). High bits of the left-shifted value are
938 Instruction *InstCombinerImpl::transformZExtICmp(ICmpInst *Cmp, ZExtInst &Zext,
940 // If we are just checking for a icmp eq of a single bit and zext'ing it
946 // zext (x <s 0) to i32 --> x>>u31 true if signbit set.
947 // zext (x >s -1) to i32 --> (x>>u31)^1 true if signbit clear
    [all...]
InstCombineCalls.cpp 452 // cttz(sext(x)) -> cttz(zext(x))
454 auto *Zext = IC.Builder.CreateZExt(X, II.getType());
456 IC.Builder.CreateBinaryIntrinsic(Intrinsic::cttz, Zext, Op1);
460 // Zext doesn't change the number of trailing zeros, so narrow:
461 // cttz(zext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true'.
559 // Zext doesn't change the number of set bits, so narrow:
560 // ctpop (zext X) --> zext (ctpop X)
563 return CastInst::Create(Instruction::ZExt, NarrowPop, Ty)
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InstCombineCompares.cpp 1291 Value *ZExt = Builder.CreateZExt(Add, OrigAdd->getType());
1295 IC.replaceInstUsesWith(*OrigAdd, ZExt);
1542 APInt NewRHS = C.zext(SrcBits);
1778 Constant *ZextC1 = ConstantInt::get(WideType, C1.zext(WideScalarBits));
1779 Constant *ZextC2 = ConstantInt::get(WideType, C2->zext(WideScalarBits));
3564 // and+icmp, and [zext+]shift instrs will be constant-folded. If they are not,
4308 // Transform (zext A) == (B & (1<<X)-1) --> A == (trunc B)
4309 // and (B & (1<<X)-1) == (zext A) --> A == (trunc B)
4368 APInt CmpV = Cst1->getValue().zext(ASize);
4424 // and the other is a zext), then we can't handle this
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/
AggressiveInstCombine.cpp 292 Value *Zext = Builder.CreateZExt(Cmp, I.getType());
293 I.replaceAllUsesWith(Zext);
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
CorrelatedValuePropagation.cpp 68 STATISTIC(NumSExt, "Number of sext converted to zext");
758 auto *Zext = B.CreateZExt(BO, Instr->getType(), Instr->getName() + ".zext");
763 Instr->replaceAllUsesWith(Zext);
921 auto *ZExt =
923 ZExt->setDebugLoc(SDI->getDebugLoc());
924 SDI->replaceAllUsesWith(ZExt);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 1415 // fold (aext (zext x)) -> (zext x)
2172 // Match a constant operand and a zext operand for the math instruction:
2182 // Match the zext operand as a setcc of a boolean.
2197 // add (zext i1 (seteq (X & 1), 0)), C --> sub C+1, (zext (X & 1))
2198 // sub C, (zext i1 (seteq (X & 1), 0)) --> add C-1, (zext (X & 1))
2306 // add (sext i1 X), 1 -> zext (not i1 X)
2308 // add (zext i1 X), -1 -> sext (not i1 X
    [all...]
TargetLowering.cpp 72 if (CallerAttrs.contains(Attribute::ZExt) ||
112 IsZExt = Attrs.hasParamAttribute(ArgIdx, Attribute::ZExt);
1872 Known.Zero = KnownLo.Zero.zext(BitWidth) |
1873 KnownHi.Zero.zext(BitWidth).shl(HalfBitWidth);
1875 Known.One = KnownLo.One.zext(BitWidth) |
1876 KnownHi.One.zext(BitWidth).shl(HalfBitWidth);
1909 Known = Known.zext(BitWidth);
2006 APInt TruncMask = DemandedBits.zext(OperandBitWidth);
2797 // zext(undef) upper bits are guaranteed to be zero.
2901 // zext(undef) upper bits are guaranteed to be zero
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  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 2424 // zext (shl nuw i8 %x, C) to i32 --> shl (zext i8 %x to i32), (zext C)
2427 SDValue Zext = CurDAG->getNode(ISD::ZERO_EXTEND, DL, VT, Shl.getOperand(0));
2428 SDValue NewShl = CurDAG->getNode(ISD::SHL, DL, VT, Zext, Shl.getOperand(1));
2432 AM.IndexReg = Zext;
2434 insertDAGNode(*CurDAG, N, Zext);
3607 // We could zext to i16 in some form, but we intentionally don't do that.
3975 // AND32ri is the same as AND64ri32 with zext imm.
4007 // Find the smallest zext this could possibly be
    [all...]
X86ISelLowering.cpp 2715 else if (VA.getLocInfo() == CCValAssign::ZExt)
3329 // Set SExt or ZExt flag.
3330 if (VA.getLocInfo() == CCValAssign::ZExt) {
3717 else if (VA.getLocInfo() == CCValAssign::ZExt)
4093 case CCValAssign::ZExt:
7697 // Peek through trunc/aext/zext.
13121 // Found a valid a/zext mask! Try various lowering strategies based on the
13248 /// The reason we have dedicated lowering for zext-style shuffles is that they
13431 // We need to zext the scalar if it is smaller than an i32.
13434 // Using zext to expand a narrow element won't work for non-zer
    [all...]
  /src/external/apache2/llvm/dist/llvm/bindings/ocaml/llvm/
llvm.ml 115 | Zext
215 | ZExt
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
LegalizerHelper.cpp 510 if (CallerAttrs.hasAttribute(AttributeList::ReturnIndex, Attribute::ZExt) ||
915 bool ZExt = MI.getOpcode() == TargetOpcode::G_ZEXTLOAD;
932 if (ZExt)
1931 // First ZEXT the input.
2163 : SrcVal.zext(WideTy.getSizeInBits());
2277 // TODO: Probably should be zext
2299 // TODO: Probably should be zext
6025 auto Zext = MIRBuilder.buildZExt(Src0Ty, Src1);
6026 auto Shift = MIRBuilder.buildShl(Src0Ty, Zext, ShiftAmt);

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