| /src/sys/arch/powerpc/include/ |
| fenv.h | 155 union __fpscr __r; local in function:feclearexcept
159 __mffs(&__r.__d);
160 __r.__bits.__reg &= ~__excepts;
161 __mtfsf(__r.__d);
168 union __fpscr __r; local in function:fegetexceptflag
170 __mffs(&__r.__d);
171 *__flagp = __r.__bits.__reg & __excepts;
178 union __fpscr __r; local in function:fesetexceptflag
182 __mffs(&__r.__d);
183 __r.__bits.__reg &= ~__excepts
192 union __fpscr __r; local in function:feraiseexcept
205 union __fpscr __r; local in function:fetestexcept
214 union __fpscr __r; local in function:fegetround
223 union __fpscr __r; local in function:fesetround
237 union __fpscr __r; local in function:fegetenv
247 union __fpscr __r; local in function:feholdexcept
261 union __fpscr __r; local in function:fesetenv
272 union __fpscr __r; local in function:feupdateenv
291 union __fpscr __r; local in function:feenableexcept
305 union __fpscr __r; local in function:fedisableexcept
319 union __fpscr __r; local in function:fegetexcept
[all...] |
| /src/sys/arch/alpha/include/ |
| fenv.h | 84 union __fpcr __r; local in function:feclearexcept
87 __mf_fpcr(&__r.__d);
88 __r.__bits &= ~((fenv_t)__excepts << _FPUSW_SHIFT);
89 __mt_fpcr(__r.__d);
97 union __fpcr __r; local in function:fegetexceptflag
100 __mf_fpcr(&__r.__d);
102 *__flagp = (__r.__bits >> _FPUSW_SHIFT) & __excepts;
109 union __fpcr __r; local in function:fesetexceptflag
115 __mf_fpcr(&__r.__d);
116 __r.__bits &= ~__xexcepts
141 union __fpcr __r; local in function:fetestexcept
152 union __fpcr __r; local in function:fegetround
165 union __fpcr __r; local in function:fesetround
[all...] |
| /src/lib/libm/arch/sparc64/ |
| fenv.c | 54 #define __ldxfsr(__r) __asm__ __volatile__ \
55 ("ldx %0, %%fsr" : : "m" (__r))
58 #define __stxfsr(__r) __asm__ __volatile__ \
59 ("stx %%fsr, %0" : "=m" (*(__r)))
64 #define __ldxfsr(__r) __asm__ __volatile__ \
65 ("ld %0, %%fsr" : : "m" (__r))
68 #define __stxfsr(__r) __asm__ __volatile__ \
69 ("st %%fsr, %0" : "=m" (*(__r)))
|
| /src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/scryptsalsa208sha256/ |
| crypto_scrypt.h | 73 size_t __saltlen, uint64_t __N, uint32_t __r,
78 size_t __saltlen, uint64_t __N, uint32_t __r,
83 size_t __saltlen, uint64_t __N, uint32_t __r,
90 extern uint8_t *escrypt_gensalt_r(uint32_t __N_log2, uint32_t __r, uint32_t __p,
|
| /src/sys/crypto/arch/arm/ |
| arm_neon.h | 172 uint32x4_t __r = __builtin_neon_vextq_v((int8x16_t)__lo_r, \
174 __builtin_shufflevector(__r, __r, 3,2,1,0); \
221 uint8x16_t __r = __builtin_neon_vextq_v((int8x16_t)__lo_r, \
223 __builtin_shufflevector(__r, __r, \
337 uint8x16_t __r;
339 __r = __builtin_neon_vqtbl1q_v((int8x16_t)__tab, (int8x16_t)__idx, 48);
355 __r = (uint8x16_t)__out64;
358 __r = __builtin_shufflevector(__r, __r
[all...] |
| /src/lib/libm/arch/sparc/ |
| fenv.c | 52 #define __ldfsr(__r) __asm__ __volatile__ \
53 ("ld %0, %%fsr" : : "m" (__r))
56 #define __stfsr(__r) __asm__ __volatile__ \
57 ("st %%fsr, %0" : "=m" (*(__r)))
|
| /src/sys/arch/ia64/include/ |
| fenv.h | 68 #define __stfpsr(__r) __asm __volatile("mov %0=ar.fpsr" : "=r" (*(__r)))
69 #define __ldfpsr(__r) __asm __volatile("mov ar.fpsr=%0;;" : : "r" (__r))
|
| /src/sys/sys/ |
| pmf.h | 101 #define pmf_device_register(__d, __s, __r) \
102 pmf_device_register1((__d), (__s), (__r), NULL)
|
| /src/sys/external/bsd/acpica/dist/include/platform/ |
| acefi.h | 375 UINT64 __r = LShiftU64 (__n, (s32)); \
376 (n_lo) = (UINT32) __r; \
377 (n_hi) = (UINT32) (__r >> 32); \
385 UINT64 __r = RShiftU64 (__n, (s32)); \
386 (n_lo) = (UINT32) __r; \
387 (n_hi) = (UINT32) (__r >> 32); \
|
| /src/lib/libm/src/ |
| math_private.h | 437 volatile __typeof(a) __ia, __ib, __r, __vw; \
450 __r = __ia - __vw; \
451 __r += __ib; \
452 assert(__vw == (a) && __r == (b)); \
|
| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/ |
| sanitizer_mac.cc | 696 *bp = ucontext->uc_mcontext->__ss.__r[7];
|
