| /src/sys/dev/ic/ |
| ath_netbsd.h | 52 #define ATH_TXQ_LOCK_INIT(_sc, _tq) mutex_init(&(_tq)->axq_lock, MUTEX_DEFAULT, IPL_NET)
59 #define ATH_TXBUF_LOCK_INIT(_sc) mutex_init(&(_sc)->sc_txbuflock, MUTEX_DEFAULT, IPL_NET)
60 #define ATH_TXBUF_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->sc_txbuflock)
61 #define ATH_TXBUF_LOCK(_sc) mutex_enter(&(_sc)->sc_txbuflock)
62 #define ATH_TXBUF_UNLOCK(_sc) mutex_exit(&(_sc)->sc_txbuflock)
63 #define ATH_TXBUF_LOCK_ASSERT(_sc) do { KASSERTMSG(mutex_owned(&(_sc)->sc_txbuflock), "txbuf lock unheld"); } while (/*CONSTCOND*/tr (…)
[all...] |
| /src/sys/net/lagg/ |
| if_laggproto.h | 207 #define LAGG_LOCK(_sc) mutex_enter(&(_sc)->sc_lock)
208 #define LAGG_UNLOCK(_sc) mutex_exit(&(_sc)->sc_lock)
209 #define LAGG_LOCKED(_sc) mutex_owned(&(_sc)->sc_lock)
210 #define LAGG_CLLADDR(_sc) CLLADDR((_sc)->sc_if.if_sadl)
212 #define LAGG_PORTS_FOREACH(_sc, _lp) \
213 SIMPLEQ_FOREACH((_lp), &(_sc)->sc_ports, lp_entry
[all...] |
| if_lagg_lacp.c | 220 #define LACP_LOCK(_sc) mutex_enter(&(_sc)->lsc_lock)
221 #define LACP_UNLOCK(_sc) mutex_exit(&(_sc)->lsc_lock)
222 #define LACP_LOCKED(_sc) mutex_owned(&(_sc)->lsc_lock)
229 #define LACP_PTIMER_ARM(_sc, _timer, _val) \
230 (_sc)->lsc_timer[(_timer)] = (_val)
231 #define LACP_PTIMER_DISARM(_sc, _timer) \
232 LACP_PTIMER_ARM((_sc), (_timer), 0
[all...] |
| /src/sys/dev/pci/ixgbe/ |
| ixgbe.h | 655 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
656 mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET)
657 #define IXGBE_CORE_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->core_mtx)
658 #define IXGBE_TX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->tx_mtx)
659 #define IXGBE_RX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->rx_mtx)
660 #define IXGBE_CORE_LOCK(_sc) mutex_enter(&(_sc)->core_mtx
[all...] |
| /src/sys/net/ |
| if_bridgevar.h | 352 #define BRIDGE_LOCK_OBJ(_sc) (&(_sc)->sc_iflist_psref.bip_lock)
353 #define BRIDGE_LOCK(_sc) mutex_enter(BRIDGE_LOCK_OBJ(_sc))
354 #define BRIDGE_UNLOCK(_sc) mutex_exit(BRIDGE_LOCK_OBJ(_sc))
355 #define BRIDGE_LOCKED(_sc) mutex_owned(BRIDGE_LOCK_OBJ(_sc))
357 #define BRIDGE_PSZ_PERFORM(_sc) pserialize_perform((_sc)->sc_iflist_psref.bip_psz
[all...] |
| if_bridge.c | 182 #define BRIDGE_RT_LOCK(_sc) mutex_enter((_sc)->sc_rtlist_lock)
183 #define BRIDGE_RT_UNLOCK(_sc) mutex_exit((_sc)->sc_rtlist_lock)
184 #define BRIDGE_RT_LOCKED(_sc) mutex_owned((_sc)->sc_rtlist_lock)
186 #define BRIDGE_RT_PSZ_PERFORM(_sc) \
187 pserialize_perform((_sc)->sc_rtlist_psz)
189 #define BRIDGE_RTLIST_READER_FOREACH(_brt, _sc) \
190 PSLIST_READER_FOREACH((_brt), &((_sc)->sc_rtlist),
[all...] |
| if_pppoe.c | 145 #define PPPOE_LOCK(_sc, _op) rw_enter(&(_sc)->sc_lock, (_op))
146 #define PPPOE_UNLOCK(_sc) rw_exit(&(_sc)->sc_lock)
147 #define PPPOE_WLOCKED(_sc) rw_write_held(&(_sc)->sc_lock)
164 #define DPRINTF(_sc, _fmt, _arg...) pppoe_printf((_sc), (_fmt), ##_arg)
166 #define DPRINTF(_sc, _fmt, _arg...) __nothing
|
| /src/sys/dev/pci/ |
| if_vtevar.h | 154 #define CSR_WRITE_2(_sc, reg, val) \
155 bus_space_write_2((_sc)->vte_bustag, (_sc)->vte_bushandle, \
157 #define CSR_READ_2(_sc, reg) \
158 bus_space_read_2((_sc)->vte_bustag, (_sc)->vte_bushandle, (reg))
|
| if_alcreg.h | 1491 #define CSR_WRITE_4(_sc, reg, val) \
1492 bus_space_write_4((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))
1493 #define CSR_WRITE_2(_sc, reg, val) \
1494 bus_space_write_2((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))
1495 #define CSR_WRITE_1(_sc, reg, val) \
1496 bus_space_write_1((_sc)->sc_mem_bt, (_sc)->sc_mem_bh, (reg), (val))
1497 #define CSR_READ_2(_sc, reg)
[all...] |
| if_stge.c | 223 #define CSR_WRITE_4(_sc, reg, val) \
224 bus_space_write_4((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
225 #define CSR_WRITE_2(_sc, reg, val) \
226 bus_space_write_2((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
227 #define CSR_WRITE_1(_sc, reg, val) \
228 bus_space_write_1((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
230 #define CSR_READ_4(_sc, reg)
[all...] |
| if_agereg.h | 864 #define AGE_COMMIT_MBOX(_sc) \
866 CSR_WRITE_4(_sc, AGE_MBOX, \
867 (((_sc)->age_cdata.age_rx_cons << MBOX_RD_PROD_IDX_SHIFT) & \
869 (((_sc)->age_cdata.age_rr_cons << \
871 (((_sc)->age_cdata.age_tx_prod << MBOX_TD_PROD_IDX_SHIFT) & \
875 #define AGE_RXCHAIN_RESET(_sc) \
877 (_sc)->age_cdata.age_rxhead = NULL; \
878 (_sc)->age_cdata.age_rxtail = NULL; \
879 (_sc)->age_cdata.age_rxprev_tail = NULL; \
880 (_sc)->age_cdata.age_rxlen = 0;
[all...] |
| if_alereg.h | 951 #define CSR_WRITE_4(_sc, reg, val) \
953 #define CSR_WRITE_2(_sc, reg, val) \
955 #define CSR_WRITE_1(_sc, reg, val) \
957 #define CSR_READ_2(_sc, reg) \
959 #define CSR_READ_4(_sc, reg) \
|
| virtio_pci.c | 64 #define VIRTIO_PCI_LOG(_sc, _use_log, _fmt, _args...) \
68 device_xname((_sc)->sc_dev), \
71 aprint_error_dev((_sc)->sc_dev, \
|
| if_iavf.c | 419 #define IAVF_LOG(_sc, _lvl, _fmt, _args...) \
421 if (!(_sc)->sc_attached) { \
425 aprint_error_dev((_sc)->sc_dev, _fmt, ##_args); \
428 aprint_normal_dev((_sc)->sc_dev,_fmt, ##_args); \
432 aprint_debug_dev((_sc)->sc_dev, _fmt, ##_args); \
435 struct ifnet *_ifp = &(_sc)->sc_ec.ec_if; \
626 #define iavf_nqueues(_sc) (1 << ((_sc)->sc_nqueue_pairs - 1))
627 #define iavf_allqueues(_sc) ((1 << ((_sc)->sc_nqueue_pairs)) - 1
[all...] |
| /src/sys/arch/arm/imx/ |
| imx23_clkctrl.c | 55 static clkctrl_softc_t _sc = NULL; variable in typeref:typename:clkctrl_softc_t
129 _sc = sc;
140 struct clkctrl_softc *sc = _sc;
160 struct clkctrl_softc *sc = _sc;
|
| imx23_digctl.c | 60 static digctl_softc_t _sc = NULL; variable in typeref:typename:digctl_softc_t
157 _sc = sc;
167 struct digctl_softc *sc = _sc;
191 struct digctl_softc *sc = _sc;
|
| imx23_rtc.c | 56 static rtc_softc_t _sc = NULL; variable in typeref:typename:rtc_softc_t
131 _sc = sc;
141 struct rtc_softc *sc = _sc;
|
| imx23_pinctrl.c | 71 static imx23_pinctrl_softc_t _sc = NULL; variable in typeref:typename:imx23_pinctrl_softc_t
444 _sc = sc;
503 struct imx23_pinctrl_softc *sc = _sc;
|
| /src/sys/arch/arm/sunxi/ |
| sunxi_codec.c | 52 #define AC_DAC_DPC(_sc) ((_sc)->sc_cfg->DPC)
54 #define AC_DAC_FIFOC(_sc) ((_sc)->sc_cfg->DAC_FIFOC)
74 #define AC_DAC_FIFOS(_sc) ((_sc)->sc_cfg->DAC_FIFOS)
75 #define AC_DAC_TXDATA(_sc) ((_sc)->sc_cfg->DAC_TXDATA)
76 #define AC_ADC_FIFOC(_sc) ((_sc)->sc_cfg->ADC_FIFOC
[all...] |
| /src/sys/arch/arm/at91/ |
| at91pio.c | 69 #define PIO_READ(_sc, _reg) bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_reg))
70 #define PIO_WRITE(_sc, _reg, _val) bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_reg), (_val))
|
| /src/sys/arch/hppa/dev/ |
| wax.c | 77 wax_fix_args(void *_sc, struct gsc_attach_args *ga)
79 struct wax_softc *sc = _sc;
|
| asp.c | 145 asp_fix_args(void *_sc, struct gsc_attach_args *ga)
148 struct asp_softc *sc = _sc;
|
| lasi.c | 95 lasi_fix_args(void *_sc, struct gsc_attach_args *ga)
97 struct lasi_softc *sc = _sc;
|
| /src/sys/dev/pci/igc/ |
| if_igc.h | 389 #define DEVNAME(_sc) ((_sc)->sc_dev.dv_xname)
|
| /src/sys/arch/arm/rockchip/ |
| rk_usb.c | 64 #define RK3399_PHY_NO(_sc) ((_sc)->sc_reg == 0xe450 ? 0 : 1)
|
