HomeSort by: relevance | last modified time | path
    Searched refs:ac_aa64isar0 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/arch/aarch64/aarch64/
cpu.c 408 aprint_verbose_dev(self, "auxID=0x%" PRIx64, ci->ci_id.ac_aa64isar0);
435 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_CRC32)) {
440 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_SHA1)) {
445 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_SHA2)) {
450 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_AES)) {
458 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_RNDR)) {
565 id->ac_aa64isar0 = reg_id_aa64isar0_el1_read();
665 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_RNDR)) {
696 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_AES)) {
procfs_machdep.c 66 isar0 = ci->ci_id.ac_aa64isar0;
  /src/usr.sbin/cpuctl/arch/
aarch64.c 1151 cpuname, id->ac_aa64isar0);
1182 id_aa64isar0_fieldinfo, id->ac_aa64isar0);
  /src/sys/crypto/aes/arch/arm/
aes_armv8.c 300 switch (__SHIFTOUT(id->ac_aa64isar0, ID_AA64ISAR0_EL1_AES)) {
  /src/sys/arch/aarch64/include/
armreg.h 1902 uint64_t ac_aa64isar0; /* A64 Instruction Set Attribute Register 0 */ member in struct:aarch64_sysctl_cpu_id

Completed in 16 milliseconds