| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsBranchExpansion.cpp | 357 MIB.addMBB(MBBOpnd);
490 .addMBB(TgtMBB, MipsII::MO_ABS_HI)
491 .addMBB(BalTgtMBB);
494 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB);
498 .addMBB(TgtMBB, MipsII::MO_ABS_LO)
499 .addMBB(BalTgtMBB);
598 .addMBB(TgtMBB, MipsII::MO_ABS_HI)
599 .addMBB(BalTgtMBB);
605 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB);
609 .addMBB(TgtMBB, MipsII::MO_ABS_LO
[all...] |
| Mips16ISelLowering.cpp | 545 .addMBB(sinkMBB);
562 .addMBB(thisMBB)
564 .addMBB(copy0MBB);
609 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
626 .addMBB(thisMBB)
628 .addMBB(copy0MBB);
675 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
692 .addMBB(thisMBB)
694 .addMBB(copy0MBB);
714 BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(BtOpc)).addMBB(target)
[all...] |
| MipsExpandPseudo.cpp | 150 .addReg(Scratch2).addReg(ShiftCmpVal).addMBB(sinkMBB);
170 .addMBB(loop1MBB);
280 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB);
290 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB);
540 .addReg(StoreVal).addReg(Mips::ZERO).addMBB(loopMBB);
804 .addMBB(loopMBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.cpp | 196 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(TBB);
199 .addMBB(TBB);
204 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB);
205 BuildMI(&MBB, DL, get(NVPTX::GOTO)).addMBB(FBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyInstrInfo.cpp | 183 BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(TBB);
190 BuildMI(&MBB, DL, get(WebAssembly::BR_IF)).addMBB(TBB).add(Cond[1]);
192 BuildMI(&MBB, DL, get(WebAssembly::BR_UNLESS)).addMBB(TBB).add(Cond[1]);
196 BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(FBB);
|
| WebAssemblyFixIrreducibleControlFlow.cpp | 385 MIB.addMBB(Entry);
456 BuildMI(Routing, DebugLoc(), TII.get(WebAssembly::BR)).addMBB(Dispatch);
479 MIB.addMBB(MIB.getInstr()
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCBranchFinalize.cpp | 120 .addMBB(MI->getOperand(0).getMBB())
138 .addMBB(MI->getOperand(0).getMBB())
|
| ARCInstrInfo.cpp | 383 BuildMI(&MBB, dl, get(ARC::BR)).addMBB(TBB);
388 MIB.addMBB(TBB);
399 BuildMI(&MBB, dl, get(ARC::BR)).addMBB(FBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVExpandAtomicPseudoInsts.cpp | 253 .addMBB(LoopMBB);
338 .addMBB(LoopMBB);
456 .addMBB(LoopTailMBB);
464 .addMBB(LoopTailMBB);
471 .addMBB(LoopTailMBB);
477 .addMBB(LoopTailMBB);
497 .addMBB(LoopHeadMBB);
552 .addMBB(DoneMBB);
562 .addMBB(LoopHeadMBB);
577 .addMBB(DoneMBB)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRInstrInfo.cpp | 356 .addMBB(UnCondBrIter->getOperand(0).getMBB());
358 .addMBB(TargetBB);
413 auto &MI = *BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(TBB);
422 auto &CondMI = *BuildMI(&MBB, DL, getBrCond(CC)).addMBB(TBB);
429 auto &MI = *BuildMI(&MBB, DL, get(AVR::RJMPk)).addMBB(FBB);
568 auto &MI = *BuildMI(&MBB, DL, get(AVR::JMPk)).addMBB(&NewDestBB);
|
| AVRISelLowering.cpp | 1594 BuildMI(BB, dl, TII.get(AVR::RJMPk)).addMBB(CheckBB);
1610 .addMBB(BB)
1612 .addMBB(LoopBB);
1615 .addMBB(BB)
1617 .addMBB(LoopBB);
1620 .addMBB(BB)
1622 .addMBB(LoopBB);
1626 BuildMI(CheckBB, dl, TII.get(AVR::BRPLk)).addMBB(LoopBB);
1706 BuildMI(MBB, dl, TII.get(AVR::RJMPk)).addMBB(FallThrough);
1726 BuildMI(MBB, dl, TII.getBrCond(CC)).addMBB(trueMBB)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 268 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(TBB);
274 BuildMI(&MBB, DL, get(MSP430::JCC)).addMBB(TBB).addImm(Cond[0].getImm());
279 BuildMI(&MBB, DL, get(MSP430::JMP)).addMBB(FBB);
|
| MSP430BranchSelector.cpp | 197 .addMBB(NextMBB)
204 MI = BuildMI(*MBB, MI, dl, TII->get(MSP430::Bi)).addMBB(DestBB);
|
| MSP430ISelLowering.cpp | 1511 .addMBB(RemBB)
1520 .addReg(SrcReg).addMBB(BB)
1521 .addReg(ShiftReg2).addMBB(LoopBB);
1523 .addReg(ShiftAmtSrcReg).addMBB(BB)
1524 .addReg(ShiftAmtReg2).addMBB(LoopBB);
1538 .addMBB(LoopBB)
1544 .addReg(SrcReg).addMBB(BB)
1545 .addReg(ShiftReg2).addMBB(LoopBB);
1597 .addMBB(copy1MBB)
1614 .addMBB(copy0MBB
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 286 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB);
291 .addMBB(TBB);
300 .addMBB(TBB);
301 BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SILateBranchLowering.cpp | 108 .addMBB(EarlyExitBlock);
212 .addMBB(EmptyMBBAtEnd);
|
| AMDGPUMachineCFGStructurizer.cpp | 403 void addMBB(MachineBasicBlock *MBB);
978 void LinearizedRegion::addMBB(MachineBasicBlock *MBB) { MBBs.insert(MBB); }
982 addMBB(MBB);
1468 MIB.addMBB(SourceMBB);
1480 MIB.addMBB(SourcePred);
1512 MIB.addMBB(LastMerge);
1522 MIB.addMBB(SourcePred);
1561 MIB.addMBB(IfMBB);
1572 MIB.addMBB(SourcePred);
1755 MIB.addMBB(IfBB)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 255 BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB);
263 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC);
265 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC);
269 BuildMI(&MBB, DL, get(SP::BA)).addMBB(FBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| MachineSSAUpdater.cpp | 195 InsertedPHI.addReg(PredValues[i].second).addMBB(PredValues[i].first);
315 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonEarlyIfConv.cpp | 746 .addMBB(TB);
910 .addMBB(FP.JoinB);
917 .addMBB(TSB);
927 MIB.addMBB(FSB);
936 .addMBB(SSB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86CmovConversion.cpp | 693 BuildMI(MBB, DL, TII->get(X86::JCC_1)).addMBB(SinkMBB).addImm(CC);
838 .addMBB(FalseMBB)
840 .addMBB(MBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCExpandISEL.cpp | 412 .addMBB(IsTrueBlockRequired ? TrueBlock : Successor);
418 .addMBB(Successor);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMBlockPlacement.cpp | 206 MIB.addMBB(To);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 822 BuildMI(BB, DL, TII.get(NewCC)).addReg(LHS).addReg(RHS).addMBB(Copy1MBB);
828 .addReg(LHS).addImm(imm32).addMBB(Copy1MBB);
845 .addMBB(Copy0MBB)
847 .addMBB(ThisMBB);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kInstrInfo.cpp | 200 .addMBB(UncondBranch.second);
291 BuildMI(&MBB, DL, get(M68k::BRA8)).addMBB(TBB);
302 BuildMI(&MBB, DL, get(Opc)).addMBB(TBB);
306 BuildMI(&MBB, DL, get(M68k::BRA8)).addMBB(FBB);
|
