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    Searched refs:addRegMask (Results 1 - 20 of 20) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86CallLowering.cpp 314 .addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv));
X86ExpandPseudo.cpp 252 .addRegMask(RegMask)
X86FastISel.cpp 3504 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
X86ISelLowering.cpp     [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineInstrBuilder.h 197 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMCallLowering.cpp 489 MIB.addRegMask(TRI->getCallPreservedMask(MF, Info.CallConv));
ARMFastISel.cpp 2276 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
2420 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
ARMISelLowering.cpp 10281 MIB.addRegMask(RI.getSjLjDispatchPreservedMask(*MF));
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZElimCompare.cpp 687 MIB.addRegMask(RegMask);
SystemZInstrInfo.cpp 750 .addRegMask(RegMask)
763 .addRegMask(RegMask)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.cpp 928 MIB.addRegMask(Mask);
1110 MIB.addRegMask(Mask);
AArch64InstructionSelector.cpp 3339 .addRegMask(TRI.getTLSCallPreservedMask());
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCallLowering.cpp 1137 MIB.addRegMask(Mask);
1311 MIB.addRegMask(Mask);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsCallLowering.cpp 547 MIB.addRegMask(TRI->getCallPreservedMask(MF, F.getCallingConv()));
MipsFastISel.cpp 1568 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 408 MIB.addRegMask(RM->getRegMask());
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelLowering.cpp 2043 MIB.addRegMask(RegInfo->getNoPreservedMask());
2267 .addRegMask(RI.getNoPreservedMask());
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCFastISel.cpp 1682 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));
PPCISelLowering.cpp 11470 MIB.addRegMask(TRI->getNoPreservedMask());
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 3249 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC));

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