1 /* $NetBSD: sunxi_debe.c,v 1.18 2025/09/06 22:53:48 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 Manuel Bouyer <bouyer (at) antioche.eu.org> 5 * All rights reserved. 6 * 7 * Copyright (c) 2014 Jared D. McNeill <jmcneill (at) invisible.ca> 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include "genfb.h" 33 34 #ifndef SUNXI_DEBE_VIDEOMEM 35 #define SUNXI_DEBE_VIDEOMEM (16 * 1024 * 1024) 36 #endif 37 38 #define SUNXI_DEBE_CURMAX 64 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: sunxi_debe.c,v 1.18 2025/09/06 22:53:48 thorpej Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/bus.h> 45 #include <sys/device.h> 46 #include <sys/intr.h> 47 #include <sys/systm.h> 48 #include <sys/kernel.h> 49 #include <sys/mutex.h> 50 #include <sys/condvar.h> 51 52 #include <dev/fdt/fdtvar.h> 53 #include <dev/fdt/fdt_console.h> 54 #include <dev/fdt/fdt_port.h> 55 56 #include <dev/videomode/videomode.h> 57 #include <dev/wscons/wsconsio.h> 58 #include <dev/wsfb/genfbvar.h> 59 60 #include <arm/sunxi/sunxi_debereg.h> 61 #include <arm/sunxi/sunxi_display.h> 62 #include <arm/sunxi/sunxi_platform.h> 63 #include <machine/bootconfig.h> 64 65 enum sunxi_debe_type { 66 DEBE_A10 = 1, 67 }; 68 69 struct sunxi_debe_softc { 70 device_t sc_dev; 71 device_t sc_fbdev; 72 enum sunxi_debe_type sc_type; 73 bus_space_tag_t sc_bst; 74 bus_space_handle_t sc_bsh; 75 bus_dma_tag_t sc_dmat; 76 77 struct clk *sc_clk_ahb; 78 struct clk *sc_clk_mod; 79 struct clk *sc_clk_ram; 80 81 struct fdtbus_reset *sc_rst; 82 83 bus_dma_segment_t sc_dmasegs[1]; 84 bus_size_t sc_dmasize; 85 bus_dmamap_t sc_dmamap; 86 void *sc_dmap; 87 88 bool sc_cursor_enable; 89 int sc_cursor_x, sc_cursor_y; 90 int sc_hot_x, sc_hot_y; 91 uint8_t sc_cursor_bitmap[8 * SUNXI_DEBE_CURMAX]; 92 uint8_t sc_cursor_mask[8 * SUNXI_DEBE_CURMAX]; 93 94 int sc_phandle; 95 struct fdt_device_ports sc_ports; 96 struct fdt_endpoint *sc_out_ep; 97 int sc_unit; /* debe0 or debe1 */ 98 }; 99 100 #define DEBE_READ(sc, reg) \ 101 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 102 #define DEBE_WRITE(sc, reg, val) \ 103 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 104 105 static const struct device_compatible_entry compat_data[] = { 106 { .compat = "allwinner,sun4i-a10-display-backend", .value = DEBE_A10 }, 107 { .compat = "allwinner,sun7i-a20-display-backend", .value = DEBE_A10 }, 108 DEVICE_COMPAT_EOL 109 }; 110 111 struct sunxifb_attach_args { 112 void *afb_fb; 113 uint32_t afb_width; 114 uint32_t afb_height; 115 bus_dma_tag_t afb_dmat; 116 bus_dma_segment_t *afb_dmasegs; 117 int afb_ndmasegs; 118 }; 119 120 static void sunxi_debe_ep_connect(device_t, struct fdt_endpoint *, bool); 121 static int sunxi_debe_ep_enable(device_t, struct fdt_endpoint *, bool); 122 static int sunxi_debe_match(device_t, cfdata_t, void *); 123 static void sunxi_debe_attach(device_t, device_t, void *); 124 125 static int sunxi_debe_alloc_videomem(struct sunxi_debe_softc *); 126 static void sunxi_debe_setup_fbdev(struct sunxi_debe_softc *, 127 const struct videomode *); 128 129 static int sunxi_debe_set_curpos(struct sunxi_debe_softc *, int, int); 130 static int sunxi_debe_set_cursor(struct sunxi_debe_softc *, 131 struct wsdisplay_cursor *); 132 static int sunxi_debe_ioctl(device_t, u_long, void *); 133 static void sunxi_befb_set_videomode(device_t, u_int, u_int); 134 void sunxi_debe_dump_regs(int); 135 136 static struct sunxi_debe_softc *debe_console_sc; 137 static int sunxi_simplefb_phandle = -1; 138 139 CFATTACH_DECL_NEW(sunxi_debe, sizeof(struct sunxi_debe_softc), 140 sunxi_debe_match, sunxi_debe_attach, NULL, NULL); 141 142 static int 143 sunxi_debe_match(device_t parent, cfdata_t cf, void *aux) 144 { 145 struct fdt_attach_args * const faa = aux; 146 147 return of_compatible_match(faa->faa_phandle, compat_data); 148 } 149 150 static void 151 sunxi_debe_attach(device_t parent, device_t self, void *aux) 152 { 153 struct sunxi_debe_softc *sc = device_private(self); 154 struct fdt_attach_args * const faa = aux; 155 const int phandle = faa->faa_phandle; 156 bus_addr_t addr; 157 bus_size_t size; 158 int error; 159 160 sc->sc_dev = self; 161 sc->sc_phandle = phandle; 162 sc->sc_bst = faa->faa_bst; 163 sc->sc_dmat = faa->faa_dmat; 164 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 165 aprint_error(": couldn't get registers\n"); 166 } 167 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 168 aprint_error(": couldn't map registers\n"); 169 return; 170 } 171 172 sc->sc_clk_ahb = fdtbus_clock_get(phandle, "ahb"); 173 sc->sc_clk_mod = fdtbus_clock_get(phandle, "mod"); 174 sc->sc_clk_ram = fdtbus_clock_get(phandle, "ram"); 175 176 if (sc->sc_clk_ahb == NULL || sc->sc_clk_mod == NULL 177 || sc->sc_clk_ram == NULL) { 178 aprint_error(": couldn't get clocks\n"); 179 aprint_debug_dev(self, "clk ahb %s mod %s ram %s\n", 180 sc->sc_clk_ahb == NULL ? "missing" : "present", 181 sc->sc_clk_mod == NULL ? "missing" : "present", 182 sc->sc_clk_ram == NULL ? "missing" : "present"); 183 return; 184 } 185 186 sc->sc_rst = fdtbus_reset_get_index(phandle, 0); 187 if (sc->sc_rst == NULL) { 188 aprint_error(": couldn't get reset\n"); 189 return; 190 } 191 192 sc->sc_type = 193 of_compatible_lookup(faa->faa_phandle, compat_data)->value; 194 195 aprint_naive("\n"); 196 aprint_normal(": Display Engine Backend (%s)\n", 197 fdtbus_get_string(phandle, "name")); 198 199 200 sc->sc_dmasize = SUNXI_DEBE_VIDEOMEM; 201 202 error = sunxi_debe_alloc_videomem(sc); 203 if (error) { 204 aprint_error_dev(sc->sc_dev, 205 "couldn't allocate video memory, error = %d\n", error); 206 return; 207 } 208 209 sc->sc_unit = -1; 210 sc->sc_ports.dp_ep_connect = sunxi_debe_ep_connect; 211 sc->sc_ports.dp_ep_enable = sunxi_debe_ep_enable; 212 fdt_ports_register(&sc->sc_ports, self, phandle, EP_OTHER); 213 } 214 215 static void 216 sunxi_debe_doreset(void) 217 { 218 device_t dev; 219 struct sunxi_debe_softc *sc; 220 int error; 221 222 for (int i = 0;;i++) { 223 dev = device_find_by_driver_unit("sunxidebe", i); 224 if (dev == NULL) 225 return; 226 sc = device_private(dev); 227 228 if (fdtbus_reset_assert(sc->sc_rst) != 0) { 229 aprint_error_dev(dev, ": couldn't assert reset\n"); 230 return; 231 } 232 delay(1); 233 if (fdtbus_reset_deassert(sc->sc_rst) != 0) { 234 aprint_error_dev(dev, ": couldn't de-assert reset\n"); 235 return; 236 } 237 238 239 error = clk_set_rate(sc->sc_clk_mod, 300000000); 240 if (error) { 241 aprint_error_dev(dev, 242 "couldn't set mod clock rate (%d)\n", error); 243 return; 244 } 245 246 if (clk_enable(sc->sc_clk_ahb) != 0 || 247 clk_enable(sc->sc_clk_mod) != 0) { 248 aprint_error_dev(dev, ": couldn't enable clocks\n"); 249 return; 250 } 251 if (clk_disable(sc->sc_clk_ram) != 0) { 252 aprint_error_dev(dev, ": couldn't disable ram clock\n"); 253 } 254 255 for (unsigned int reg = 0x800; reg < 0x1000; reg += 4) { 256 DEBE_WRITE(sc, reg, 0); 257 } 258 259 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, SUNXI_DEBE_MODCTL_EN); 260 261 DEBE_WRITE(sc, SUNXI_DEBE_HWC_PALETTE_TABLE, 0); 262 263 if (clk_disable(sc->sc_clk_ahb) != 0 || 264 clk_disable(sc->sc_clk_mod) != 0) { 265 aprint_error_dev(sc->sc_dev, 266 ": couldn't disable clocks\n"); 267 } 268 } 269 } 270 271 static void 272 sunxi_debe_ep_connect(device_t self, struct fdt_endpoint *ep, bool connect) 273 { 274 struct sunxi_debe_softc *sc = device_private(self); 275 struct fdt_endpoint *rep = fdt_endpoint_remote(ep); 276 int rep_idx = fdt_endpoint_index(rep); 277 278 KASSERT(device_is_a(self, "sunxidebe")); 279 if (!connect) { 280 aprint_error_dev(self, "endpoint disconnect not supported\n"); 281 return; 282 } 283 284 if (fdt_endpoint_port_index(ep) == 1) { 285 bool do_print = (sc->sc_unit == -1); 286 /* 287 * one of our output endpoints has been connected. 288 * the remote id is our unit number 289 */ 290 if (sc->sc_unit != -1 && rep_idx != -1 && 291 sc->sc_unit != rep_idx) { 292 aprint_error_dev(self, ": remote id %d doesn't match" 293 " discovered unit number %d\n", 294 rep_idx, sc->sc_unit); 295 return; 296 } 297 if (!device_is_a(fdt_endpoint_device(rep), "sunxitcon")) { 298 aprint_error_dev(self, 299 ": output %d connected to unknown device\n", 300 fdt_endpoint_index(ep)); 301 return; 302 } 303 if (rep_idx != -1) 304 sc->sc_unit = rep_idx; 305 else { 306 /* assume only one debe */ 307 sc->sc_unit = 0; 308 } 309 if (do_print) 310 aprint_verbose_dev(self, "debe unit %d\n", sc->sc_unit); 311 } 312 } 313 314 static int 315 sunxi_debe_alloc_videomem(struct sunxi_debe_softc *sc) 316 { 317 int error, nsegs; 318 319 error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmasize, 0x1000, 0, 320 sc->sc_dmasegs, 1, &nsegs, BUS_DMA_WAITOK); 321 if (error) 322 return error; 323 error = bus_dmamem_map(sc->sc_dmat, sc->sc_dmasegs, nsegs, 324 sc->sc_dmasize, &sc->sc_dmap, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 325 if (error) 326 goto free; 327 error = bus_dmamap_create(sc->sc_dmat, sc->sc_dmasize, 1, 328 sc->sc_dmasize, 0, BUS_DMA_WAITOK, &sc->sc_dmamap); 329 if (error) 330 goto unmap; 331 error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_dmap, 332 sc->sc_dmasize, NULL, BUS_DMA_WAITOK); 333 if (error) 334 goto destroy; 335 336 memset(sc->sc_dmap, 0, sc->sc_dmasize); 337 338 return 0; 339 340 destroy: 341 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap); 342 unmap: 343 bus_dmamem_unmap(sc->sc_dmat, sc->sc_dmap, sc->sc_dmasize); 344 free: 345 bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, nsegs); 346 347 sc->sc_dmasize = 0; 348 sc->sc_dmap = NULL; 349 350 return error; 351 } 352 353 static void 354 sunxi_debe_setup_fbdev(struct sunxi_debe_softc *sc, const struct videomode *mode) 355 { 356 if (mode == NULL) 357 return; 358 359 const u_int interlace_p = !!(mode->flags & VID_INTERLACE); 360 const u_int fb_width = mode->hdisplay; 361 const u_int fb_height = (mode->vdisplay << interlace_p); 362 363 if (mode && sc->sc_fbdev == NULL) { 364 /* see if we are the console */ 365 if (sunxi_simplefb_phandle >= 0) { 366 const char *cons_pipeline = 367 fdtbus_get_string(sunxi_simplefb_phandle, 368 "allwinner,pipeline"); 369 struct fdt_endpoint *ep = fdt_endpoint_get_from_index( 370 &sc->sc_ports, SUNXI_PORT_OUTPUT, sc->sc_unit); 371 struct fdt_endpoint *rep = fdt_endpoint_remote(ep); 372 if (sunxi_tcon_is_console( 373 fdt_endpoint_device(rep), cons_pipeline)) 374 debe_console_sc = sc; 375 } else if (debe_console_sc == NULL) { 376 if (match_bootconf_option(boot_args, 377 "console", "fb0")) { 378 if (sc->sc_unit == 0) 379 debe_console_sc = sc; 380 } else if (match_bootconf_option(boot_args, 381 "console", "fb1")) { 382 if (sc->sc_unit == 1) 383 debe_console_sc = sc; 384 } else if (match_bootconf_option(boot_args, 385 "console", "fb")) { 386 /* match first activated */ 387 debe_console_sc = sc; 388 } 389 } 390 struct sunxifb_attach_args afb = { 391 .afb_fb = sc->sc_dmap, 392 .afb_width = fb_width, 393 .afb_height = fb_height, 394 .afb_dmat = sc->sc_dmat, 395 .afb_dmasegs = sc->sc_dmasegs, 396 .afb_ndmasegs = 1 397 }; 398 sc->sc_fbdev = config_found(sc->sc_dev, &afb, NULL, CFARGS_NONE); 399 } else if (sc->sc_fbdev != NULL) { 400 sunxi_befb_set_videomode(sc->sc_fbdev, fb_width, fb_height); 401 } 402 } 403 404 static int 405 sunxi_debe_set_curpos(struct sunxi_debe_softc *sc, int x, int y) 406 { 407 int xx, yy; 408 u_int yoff, xoff; 409 410 xoff = yoff = 0; 411 xx = x - sc->sc_hot_x; 412 yy = y - sc->sc_hot_y; 413 if (xx < 0) { 414 xoff -= xx; 415 xx = 0; 416 } 417 if (yy < 0) { 418 yoff -= yy; 419 yy = 0; 420 } 421 422 DEBE_WRITE(sc, SUNXI_DEBE_HWCCTL_REG, 423 __SHIFTIN(yy, SUNXI_DEBE_HWCCTL_YCOOR) | 424 __SHIFTIN(xx, SUNXI_DEBE_HWCCTL_XCOOR)); 425 DEBE_WRITE(sc, SUNXI_DEBE_HWCFBCTL_REG, 426 #if SUNXI_DEBE_CURMAX == 32 427 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_32, SUNXI_DEBE_HWCFBCTL_YSIZE) | 428 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_32, SUNXI_DEBE_HWCFBCTL_XSIZE) | 429 #else 430 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_YSIZE_64, SUNXI_DEBE_HWCFBCTL_YSIZE) | 431 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_XSIZE_64, SUNXI_DEBE_HWCFBCTL_XSIZE) | 432 #endif 433 __SHIFTIN(SUNXI_DEBE_HWCFBCTL_FBFMT_2BPP, SUNXI_DEBE_HWCFBCTL_FBFMT) | 434 __SHIFTIN(yoff, SUNXI_DEBE_HWCFBCTL_YCOOROFF) | 435 __SHIFTIN(xoff, SUNXI_DEBE_HWCFBCTL_XCOOROFF)); 436 437 return 0; 438 } 439 440 static int 441 sunxi_debe_set_cursor(struct sunxi_debe_softc *sc, struct wsdisplay_cursor *cur) 442 { 443 uint32_t val; 444 uint8_t r[4], g[4], b[4]; 445 u_int index, count, shift, off, pcnt; 446 int i, j, idx, error; 447 uint8_t mask; 448 449 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 450 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 451 if (cur->enable) 452 val |= SUNXI_DEBE_MODCTL_HWC_EN; 453 else 454 val &= ~SUNXI_DEBE_MODCTL_HWC_EN; 455 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val); 456 457 sc->sc_cursor_enable = cur->enable; 458 } 459 460 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 461 sc->sc_hot_x = cur->hot.x; 462 sc->sc_hot_y = cur->hot.y; 463 cur->which |= WSDISPLAY_CURSOR_DOPOS; 464 } 465 466 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 467 sunxi_debe_set_curpos(sc, cur->pos.x, cur->pos.y); 468 } 469 470 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 471 index = cur->cmap.index; 472 count = cur->cmap.count; 473 if (index >= 2 || count > 2 - index) 474 return EINVAL; 475 error = copyin(cur->cmap.red, &r[index], count); 476 if (error) 477 return error; 478 error = copyin(cur->cmap.green, &g[index], count); 479 if (error) 480 return error; 481 error = copyin(cur->cmap.blue, &b[index], count); 482 if (error) 483 return error; 484 485 for (i = index; i < (index + count); i++) { 486 DEBE_WRITE(sc, 487 SUNXI_DEBE_HWC_PALETTE_TABLE + (4 * (i + 2)), 488 (r[i] << 16) | (g[i] << 8) | b[i] | 0xff000000); 489 } 490 } 491 492 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 493 error = copyin(cur->mask, sc->sc_cursor_mask, 494 SUNXI_DEBE_CURMAX * 8); 495 if (error) 496 return error; 497 error = copyin(cur->image, sc->sc_cursor_bitmap, 498 SUNXI_DEBE_CURMAX * 8); 499 if (error) 500 return error; 501 } 502 503 if (cur->which & (WSDISPLAY_CURSOR_DOCMAP|WSDISPLAY_CURSOR_DOSHAPE)) { 504 for (i = 0, pcnt = 0; i < SUNXI_DEBE_CURMAX * 8; i++) { 505 for (j = 0, mask = 1; j < 8; j++, mask <<= 1, pcnt++) { 506 idx = ((sc->sc_cursor_mask[i] & mask) ? 2 : 0) | 507 ((sc->sc_cursor_bitmap[i] & mask) ? 1 : 0); 508 off = (pcnt >> 4) * 4; 509 shift = (pcnt & 0xf) * 2; 510 val = DEBE_READ(sc, 511 SUNXI_DEBE_HWC_PATTERN_BLOCK + off); 512 val &= ~(3 << shift); 513 val |= (idx << shift); 514 DEBE_WRITE(sc, 515 SUNXI_DEBE_HWC_PATTERN_BLOCK + off, val); 516 } 517 } 518 } 519 520 return 0; 521 } 522 523 static int 524 sunxi_debe_ep_enable(device_t dev, struct fdt_endpoint *ep, bool enable) 525 { 526 struct sunxi_debe_softc *sc; 527 uint32_t val; 528 529 KASSERT(device_is_a(dev, "sunxidebe")); 530 sc = device_private(dev); 531 532 if (enable) { 533 if (clk_enable(sc->sc_clk_ram) != 0) { 534 device_printf(dev, 535 ": warning: failed to enable ram clock\n"); 536 } 537 val = DEBE_READ(sc, SUNXI_DEBE_REGBUFFCTL_REG); 538 val |= SUNXI_DEBE_REGBUFFCTL_REGLOADCTL; 539 DEBE_WRITE(sc, SUNXI_DEBE_REGBUFFCTL_REG, val); 540 541 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 542 val |= SUNXI_DEBE_MODCTL_START_CTL; 543 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val); 544 #ifdef SUNXI_DEBE_DEBUG 545 sunxi_debe_dump_regs(sc->sc_unit); 546 #endif 547 } else { 548 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 549 val &= ~SUNXI_DEBE_MODCTL_START_CTL; 550 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val); 551 if (clk_disable(sc->sc_clk_ram) != 0) { 552 device_printf(dev, 553 ": warning: failed to disable ram clock\n"); 554 } 555 } 556 #if 0 557 for (int i = 0; i < 0x1000; i += 4) { 558 printf("DEBE 0x%04x: 0x%08x\n", i, DEBE_READ(sc, i)); 559 } 560 #endif 561 return 0; 562 } 563 564 /* 565 * FIXME 2020/10/19 566 * This function is not called actually at the moment. 567 */ 568 void 569 sunxi_debe_set_videomode(device_t dev, const struct videomode *mode) 570 { 571 struct sunxi_debe_softc *sc; 572 uint32_t val; 573 574 KASSERT(device_is_a(dev, "sunxidebe")); 575 sc = device_private(dev); 576 577 if (mode) { 578 const u_int interlace_p = !!(mode->flags & VID_INTERLACE); 579 const u_int width = mode->hdisplay; 580 const u_int height = (mode->vdisplay << interlace_p); 581 const u_int fb_width = width; 582 const u_int fb_height = height; 583 uint32_t vmem = width * height * 4; 584 585 if (vmem > sc->sc_dmasize) { 586 device_printf(sc->sc_dev, 587 "not enough memory for %ux%u fb (req %u have %u)\n", 588 width, height, vmem, (unsigned int)sc->sc_dmasize); 589 return; 590 } 591 592 paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr; 593 #if !defined(ALLWINNER_A80) && 0 594 #define SUNXI_SDRAM_PBASE-0 0x40000000 595 /* 596 * On 2GB systems, we need to subtract AWIN_SDRAM_PBASE from 597 * the phys addr. 598 */ 599 if (pa >= SUNXI_SDRAM_PBASE) 600 pa -= SUNXI_SDRAM_PBASE; 601 #endif 602 603 /* notify fb */ 604 sunxi_debe_setup_fbdev(sc, mode); 605 606 DEBE_WRITE(sc, SUNXI_DEBE_DISSIZE_REG, 607 ((height - 1) << 16) | (width - 1)); 608 DEBE_WRITE(sc, SUNXI_DEBE_LAYSIZE_REG, 609 ((fb_height - 1) << 16) | (fb_width - 1)); 610 DEBE_WRITE(sc, SUNXI_DEBE_LAYCOOR_REG, 0); 611 DEBE_WRITE(sc, SUNXI_DEBE_LAYLINEWIDTH_REG, (fb_width << 5)); 612 DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_L32ADD_REG, pa << 3); 613 DEBE_WRITE(sc, SUNXI_DEBE_LAYFB_H4ADD_REG, pa >> 29); 614 615 val = DEBE_READ(sc, SUNXI_DEBE_ATTCTL1_REG); 616 val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBFMT; 617 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBFMT_XRGB8888, 618 SUNXI_DEBE_ATTCTL1_LAY_FBFMT); 619 val &= ~SUNXI_DEBE_ATTCTL1_LAY_BRSWAPEN; 620 val &= ~SUNXI_DEBE_ATTCTL1_LAY_FBPS; 621 #if 0 /* __ARMEB__ */ 622 /* 623 * For big endian, we dynamically override FDT to let 624 * genfb(4) know that framebuffer is byte-swapped. 625 * See fdt_update_fb_format() in fdt_machdep.c. 626 */ 627 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_BGRA, 628 SUNXI_DEBE_ATTCTL1_LAY_FBPS); 629 #else 630 val |= __SHIFTIN(SUNXI_DEBE_ATTCTL1_LAY_FBPS_32BPP_ARGB, 631 SUNXI_DEBE_ATTCTL1_LAY_FBPS); 632 #endif 633 DEBE_WRITE(sc, SUNXI_DEBE_ATTCTL1_REG, val); 634 635 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 636 val |= SUNXI_DEBE_MODCTL_LAY0_EN; 637 if (interlace_p) { 638 val |= SUNXI_DEBE_MODCTL_ITLMOD_EN; 639 } else { 640 val &= ~SUNXI_DEBE_MODCTL_ITLMOD_EN; 641 } 642 val &= ~SUNXI_DEBE_MODCTL_OUT_SEL; 643 if (sc->sc_unit == 1) { 644 val |= __SHIFTIN(SUNXI_DEBE_MODCTL_OUT_SEL_LCD1, 645 SUNXI_DEBE_MODCTL_OUT_SEL); 646 } 647 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val); 648 } else { 649 /* disable */ 650 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 651 val &= ~SUNXI_DEBE_MODCTL_LAY0_EN; 652 val &= ~SUNXI_DEBE_MODCTL_START_CTL; 653 DEBE_WRITE(sc, SUNXI_DEBE_MODCTL_REG, val); 654 655 /* notify fb */ 656 sunxi_debe_setup_fbdev(sc, mode); 657 } 658 } 659 660 static int 661 sunxi_debe_ioctl(device_t self, u_long cmd, void *data) 662 { 663 struct sunxi_debe_softc *sc = device_private(self); 664 struct wsdisplay_curpos *cp; 665 uint32_t val; 666 int enable; 667 668 switch (cmd) { 669 case WSDISPLAYIO_SVIDEO: 670 enable = *(int *)data; 671 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 672 if (enable) { 673 if (val & SUNXI_DEBE_MODCTL_START_CTL) { 674 /* already enabled */ 675 return 0; 676 } 677 } else { 678 if ((val & SUNXI_DEBE_MODCTL_START_CTL) == 0) { 679 /* already disabled */ 680 return 0; 681 } 682 } 683 return fdt_endpoint_enable(sc->sc_out_ep, enable); 684 case WSDISPLAYIO_GVIDEO: 685 val = DEBE_READ(sc, SUNXI_DEBE_MODCTL_REG); 686 *(int *)data = !!(val & SUNXI_DEBE_MODCTL_LAY0_EN); 687 return 0; 688 case WSDISPLAYIO_GCURPOS: 689 cp = data; 690 cp->x = sc->sc_cursor_x; 691 cp->y = sc->sc_cursor_y; 692 return 0; 693 case WSDISPLAYIO_SCURPOS: 694 cp = data; 695 return sunxi_debe_set_curpos(sc, cp->x, cp->y); 696 case WSDISPLAYIO_GCURMAX: 697 cp = data; 698 cp->x = SUNXI_DEBE_CURMAX; 699 cp->y = SUNXI_DEBE_CURMAX; 700 return 0; 701 case WSDISPLAYIO_SCURSOR: 702 return sunxi_debe_set_cursor(sc, data); 703 } 704 705 return EPASSTHROUGH; 706 } 707 708 /* genfb attachment */ 709 710 struct sunxi_befb_softc { 711 struct genfb_softc sc_gen; 712 device_t sc_debedev; 713 714 bus_dma_tag_t sc_dmat; 715 bus_dma_segment_t *sc_dmasegs; 716 int sc_ndmasegs; 717 }; 718 719 static device_t sunxi_befb_consoledev = NULL; 720 721 static int sunxi_befb_match(device_t, cfdata_t, void *); 722 static void sunxi_befb_attach(device_t, device_t, void *); 723 724 static int sunxi_befb_ioctl(void *, void *, u_long, void *, int, lwp_t *); 725 static paddr_t sunxi_befb_mmap(void *, void *, off_t, int); 726 static bool sunxi_befb_shutdown(device_t, int); 727 728 CFATTACH_DECL_NEW(sunxi_befb, sizeof(struct sunxi_befb_softc), 729 sunxi_befb_match, sunxi_befb_attach, NULL, NULL); 730 731 static int 732 sunxi_befb_match(device_t parent, cfdata_t cf, void *aux) 733 { 734 return 1; 735 } 736 737 static void 738 sunxi_befb_attach(device_t parent, device_t self, void *aux) 739 { 740 struct sunxi_befb_softc *sc = device_private(self); 741 struct sunxifb_attach_args * const afb = aux; 742 prop_dictionary_t cfg = device_properties(self); 743 struct genfb_ops ops; 744 745 sc->sc_gen.sc_dev = self; 746 sc->sc_debedev = parent; 747 sc->sc_dmat = afb->afb_dmat; 748 sc->sc_dmasegs = afb->afb_dmasegs; 749 sc->sc_ndmasegs = afb->afb_ndmasegs; 750 751 prop_dictionary_set_uint32(cfg, "width", afb->afb_width); 752 prop_dictionary_set_uint32(cfg, "height", afb->afb_height); 753 prop_dictionary_set_uint8(cfg, "depth", 32); 754 prop_dictionary_set_uint16(cfg, "linebytes", afb->afb_width * 4); 755 prop_dictionary_set_uint32(cfg, "address", 0); 756 prop_dictionary_set_uint32(cfg, "virtual_address", 757 (uintptr_t)afb->afb_fb); 758 759 genfb_init(&sc->sc_gen); 760 761 if (sc->sc_gen.sc_width == 0 || sc->sc_gen.sc_fbsize == 0) { 762 aprint_normal(": disabled\n"); 763 return; 764 } 765 766 pmf_device_register1(self, NULL, NULL, sunxi_befb_shutdown); 767 768 memset(&ops, 0, sizeof(ops)); 769 ops.genfb_ioctl = sunxi_befb_ioctl; 770 ops.genfb_mmap = sunxi_befb_mmap; 771 772 aprint_naive("\n"); 773 774 bool is_console = (debe_console_sc == device_private(parent)); 775 if (is_console) 776 aprint_normal(": switching to framebuffer console\n"); 777 else 778 aprint_normal("\n"); 779 780 #ifdef WSDISPLAY_MULTICONS 781 /* 782 * if we support multicons, only the first framebuffer is console, 783 * unless we already know which framebuffer will be the console 784 */ 785 if (!is_console && debe_console_sc == NULL && 786 sunxi_befb_consoledev == NULL) 787 is_console = true; 788 #endif 789 prop_dictionary_set_bool(cfg, "is_console", is_console); 790 if (is_console) { 791 KASSERT(sunxi_befb_consoledev == NULL); 792 sunxi_befb_consoledev = self; 793 } 794 795 genfb_attach(&sc->sc_gen, &ops); 796 } 797 798 static int 799 sunxi_befb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, lwp_t *l) 800 { 801 struct sunxi_befb_softc *sc = v; 802 struct wsdisplayio_bus_id *busid; 803 struct wsdisplayio_fbinfo *fbi; 804 struct rasops_info *ri; 805 int error; 806 807 switch (cmd) { 808 case WSDISPLAYIO_GTYPE: 809 *(u_int *)data = WSDISPLAY_TYPE_ALLWINNER; 810 return 0; 811 case WSDISPLAYIO_GET_BUSID: 812 busid = data; 813 busid->bus_type = WSDISPLAYIO_BUS_SOC; 814 return 0; 815 case WSDISPLAYIO_GET_FBINFO: 816 fbi = data; 817 ri = &sc->sc_gen.vd.active->scr_ri; 818 error = wsdisplayio_get_fbinfo(ri, fbi); 819 if (error == 0) { 820 fbi->fbi_flags |= WSFB_VRAM_IS_RAM; 821 fbi->fbi_fbsize = sc->sc_dmasegs[0].ds_len; 822 } 823 return error; 824 case WSDISPLAYIO_SVIDEO: 825 case WSDISPLAYIO_GVIDEO: 826 case WSDISPLAYIO_GCURPOS: 827 case WSDISPLAYIO_SCURPOS: 828 case WSDISPLAYIO_GCURMAX: 829 case WSDISPLAYIO_SCURSOR: 830 return sunxi_debe_ioctl(sc->sc_debedev, cmd, data); 831 default: 832 return EPASSTHROUGH; 833 } 834 } 835 836 static paddr_t 837 sunxi_befb_mmap(void *v, void *vs, off_t off, int prot) 838 { 839 struct sunxi_befb_softc *sc = v; 840 841 if (off < 0 || off >= sc->sc_dmasegs[0].ds_len) 842 return -1; 843 844 return bus_dmamem_mmap(sc->sc_dmat, sc->sc_dmasegs, sc->sc_ndmasegs, 845 off, prot, BUS_DMA_PREFETCHABLE); 846 } 847 848 static bool 849 sunxi_befb_shutdown(device_t self, int flags) 850 { 851 genfb_enable_polling(self); 852 return true; 853 } 854 855 static void 856 sunxi_befb_set_videomode(device_t dev, u_int width, u_int height) 857 { 858 struct sunxi_befb_softc *sc = device_private(dev); 859 860 if (sc->sc_gen.sc_width != width || sc->sc_gen.sc_height != height) { 861 device_printf(sc->sc_gen.sc_dev, 862 "mode switching not yet supported\n"); 863 } 864 } 865 866 int 867 sunxi_debe_pipeline(int phandle, bool active) 868 { 869 device_t dev; 870 struct sunxi_debe_softc *sc; 871 struct fdt_endpoint *ep; 872 int i, error; 873 static bool reset_done = false; 874 875 if (!active) 876 return EOPNOTSUPP; 877 878 for (i = 0;;i++) { 879 dev = device_find_by_driver_unit("sunxidebe", i); 880 if (dev == NULL) 881 return ENODEV; 882 sc = device_private(dev); 883 if (sc->sc_phandle == phandle) 884 break; 885 } 886 if (!reset_done) { 887 sunxi_debe_doreset(); 888 sunxi_tcon_doreset(); 889 sunxi_hdmi_doreset(); 890 reset_done = true; 891 } 892 893 aprint_normal("activate %s\n", device_xname(dev)); 894 if (clk_enable(sc->sc_clk_ahb) != 0 || 895 clk_enable(sc->sc_clk_mod) != 0) { 896 aprint_error_dev(dev, "couldn't enable clocks\n"); 897 return EIO; 898 } 899 /* connect debd0 to tcon0, debe1 to tcon1 */ 900 ep = fdt_endpoint_get_from_index(&sc->sc_ports, SUNXI_PORT_OUTPUT, 901 sc->sc_unit); 902 if (ep == NULL) { 903 aprint_error_dev(dev, "no output endpoint for %d\n", 904 sc->sc_unit); 905 return ENODEV; 906 } 907 error = fdt_endpoint_activate(ep, true); 908 if (error) 909 return error; 910 911 sc->sc_out_ep = ep; 912 error = fdt_endpoint_enable(ep, true); 913 return error; 914 } 915 916 /* 917 * we don't want to take over console at this time - simplefb will 918 * do a better job than us. We will take over later. 919 * But we want to record the /chose/framebuffer phandle if there is one 920 */ 921 922 static const struct device_compatible_entry simplefb_compat_data[] = { 923 { .compat = "allwinner,simple-framebuffer" }, 924 DEVICE_COMPAT_EOL 925 }; 926 927 static int 928 sunxidebe_console_match(int phandle) 929 { 930 if (of_compatible_match(phandle, simplefb_compat_data)) { 931 sunxi_simplefb_phandle = phandle; 932 } 933 return 0; 934 } 935 936 static void 937 sunxidebe_console_consinit(struct fdt_attach_args *faa, u_int uart_freq) 938 { 939 panic("sunxidebe_console_consinit"); 940 } 941 942 static const struct fdt_console sunxidebe_fdt_console = { 943 .match = sunxidebe_console_match, 944 .consinit = sunxidebe_console_consinit 945 }; 946 947 FDT_CONSOLE(sunxidebe, &sunxidebe_fdt_console); 948 949 #if defined(SUNXI_DEBE_DEBUG) 950 void 951 sunxi_debe_dump_regs(int u) 952 { 953 static const struct { 954 const char *name; 955 uint16_t reg; 956 } regs[] = { 957 { "SUNXI_DEBE_MODCTL_REG", SUNXI_DEBE_MODCTL_REG}, 958 { "SUNXI_DEBE_BACKCOLOR_REG", SUNXI_DEBE_BACKCOLOR_REG}, 959 { "SUNXI_DEBE_DISSIZE_REG", SUNXI_DEBE_DISSIZE_REG}, 960 { "SUNXI_DEBE_LAYSIZE_REG", SUNXI_DEBE_LAYSIZE_REG}, 961 { "SUNXI_DEBE_LAYCOOR_REG", SUNXI_DEBE_LAYCOOR_REG}, 962 { "SUNXI_DEBE_LAYLINEWIDTH_REG", SUNXI_DEBE_LAYLINEWIDTH_REG}, 963 { "SUNXI_DEBE_LAYFB_L32ADD_REG", SUNXI_DEBE_LAYFB_L32ADD_REG}, 964 { "SUNXI_DEBE_LAYFB_H4ADD_REG", SUNXI_DEBE_LAYFB_H4ADD_REG}, 965 { "SUNXI_DEBE_REGBUFFCTL_REG", SUNXI_DEBE_REGBUFFCTL_REG}, 966 { "SUNXI_DEBE_CKMAX_REG", SUNXI_DEBE_CKMAX_REG}, 967 { "SUNXI_DEBE_CKMIN_REG", SUNXI_DEBE_CKMIN_REG}, 968 { "SUNXI_DEBE_CKCFG_REG", SUNXI_DEBE_CKCFG_REG}, 969 { "SUNXI_DEBE_ATTCTL0_REG", SUNXI_DEBE_ATTCTL0_REG}, 970 { "SUNXI_DEBE_ATTCTL1_REG", SUNXI_DEBE_ATTCTL1_REG}, 971 { "SUNXI_DEBE_HWCCTL_REG", SUNXI_DEBE_HWCCTL_REG}, 972 { "SUNXI_DEBE_HWCFBCTL_REG", SUNXI_DEBE_HWCFBCTL_REG}, 973 { "SUNXI_DEBE_WBCTL_REG", SUNXI_DEBE_WBCTL_REG}, 974 { "SUNXI_DEBE_WBADD_REG", SUNXI_DEBE_WBADD_REG}, 975 { "SUNXI_DEBE_WBLINEWIDTH_REG", SUNXI_DEBE_WBLINEWIDTH_REG}, 976 { "SUNXI_DEBE_IYUVCTL_REG", SUNXI_DEBE_IYUVCTL_REG}, 977 { "SUNXI_DEBE_IYUVADD_REG", SUNXI_DEBE_IYUVADD_REG}, 978 { "SUNXI_DEBE_IYUVLINEWIDTH_REG", SUNXI_DEBE_IYUVLINEWIDTH_REG}, 979 { "SUNXI_DEBE_YGCOEF_REG", SUNXI_DEBE_YGCOEF_REG}, 980 { "SUNXI_DEBE_YGCONS_REG", SUNXI_DEBE_YGCONS_REG}, 981 { "SUNXI_DEBE_URCOEF_REG", SUNXI_DEBE_URCOEF_REG}, 982 { "SUNXI_DEBE_URCONS_REG", SUNXI_DEBE_URCONS_REG}, 983 { "SUNXI_DEBE_VBCOEF_REG", SUNXI_DEBE_VBCOEF_REG}, 984 { "SUNXI_DEBE_VBCONS_REG", SUNXI_DEBE_VBCONS_REG}, 985 { "SUNXI_DEBE_OCCTL_REG", SUNXI_DEBE_OCCTL_REG}, 986 { "SUNXI_DEBE_OCRCOEF_REG", SUNXI_DEBE_OCRCOEF_REG}, 987 { "SUNXI_DEBE_OCRCONS_REG", SUNXI_DEBE_OCRCONS_REG}, 988 { "SUNXI_DEBE_OCGCOEF_REG", SUNXI_DEBE_OCGCOEF_REG}, 989 { "SUNXI_DEBE_OCGCONS_REG", SUNXI_DEBE_OCGCONS_REG}, 990 { "SUNXI_DEBE_OCBCOEF_REG", SUNXI_DEBE_OCBCOEF_REG}, 991 { "SUNXI_DEBE_OCBCONS_REG", SUNXI_DEBE_OCBCONS_REG}, 992 }; 993 struct sunxi_debe_softc *sc; 994 device_t dev; 995 996 dev = device_find_by_driver_unit("sunxidebe", u); 997 if (dev == NULL) 998 return; 999 sc = device_private(dev); 1000 1001 for (int i = 0; i < __arraycount(regs); i++) { 1002 printf("%s: 0x%08x\n", regs[i].name, 1003 DEBE_READ(sc, regs[i].reg)); 1004 } 1005 } 1006 #endif 1007
Indexes created Tue Sep 30 20:09:53 GMT 2025