1 /* $NetBSD: agp.c,v 1.90 2026/06/21 18:38:35 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/pci/agp.c,v 1.12 2001/05/19 01:28:07 alfred Exp $ 29 */ 30 31 /* 32 * Copyright (c) 2001 Wasabi Systems, Inc. 33 * All rights reserved. 34 * 35 * Written by Frank van der Linden for Wasabi Systems, Inc. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed for the NetBSD Project by 48 * Wasabi Systems, Inc. 49 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 50 * or promote products derived from this software without specific prior 51 * written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 55 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 56 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 57 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 58 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 59 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 60 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 61 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 62 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 63 * POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 67 #include <sys/cdefs.h> 68 __KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.90 2026/06/21 18:38:35 andvar Exp $"); 69 70 #include <sys/param.h> 71 #include <sys/agpio.h> 72 #include <sys/bus.h> 73 #include <sys/conf.h> 74 #include <sys/device.h> 75 #include <sys/fcntl.h> 76 #include <sys/ioctl.h> 77 #include <sys/kernel.h> 78 #include <sys/malloc.h> 79 #include <sys/mutex.h> 80 #include <sys/proc.h> 81 #include <sys/systm.h> 82 83 #include <dev/pci/agpreg.h> 84 #include <dev/pci/agpvar.h> 85 #include <dev/pci/pcidevs.h> 86 #include <dev/pci/pcireg.h> 87 #include <dev/pci/pcivar.h> 88 89 MALLOC_DEFINE(M_AGP, "AGP", "AGP memory"); 90 91 /* Helper functions for implementing chipset mini drivers. */ 92 /* XXXfvdl get rid of this one. */ 93 94 extern struct cfdriver agp_cd; 95 96 static int agp_info_user(struct agp_softc *, agp_info *); 97 static int agp_setup_user(struct agp_softc *, agp_setup *); 98 static int agp_allocate_user(struct agp_softc *, agp_allocate *); 99 static int agp_deallocate_user(struct agp_softc *, int); 100 static int agp_bind_user(struct agp_softc *, agp_bind *); 101 static int agp_unbind_user(struct agp_softc *, agp_unbind *); 102 static int agp_generic_enable_v2(struct agp_softc *, 103 const struct pci_attach_args *, int, u_int32_t); 104 static int agp_generic_enable_v3(struct agp_softc *, 105 const struct pci_attach_args *, int, u_int32_t); 106 static int agpdev_match(const struct pci_attach_args *); 107 static bool agp_resume(device_t, const pmf_qual_t *); 108 109 #include "agp_ali.h" 110 #include "agp_amd.h" 111 #include "agp_amd64.h" 112 #include "agp_i810.h" 113 #include "agp_intel.h" 114 #include "agp_nvidia.h" 115 #include "agp_sis.h" 116 #include "agp_via.h" 117 118 const struct agp_product { 119 uint32_t ap_vendor; 120 uint32_t ap_product; 121 int (*ap_match)(const struct pci_attach_args *); 122 int (*ap_attach)(device_t, device_t, void *); 123 } agp_products[] = { 124 #if NAGP_AMD64 > 0 125 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, 126 agp_amd64_match, agp_amd64_attach }, 127 #endif 128 129 #if NAGP_ALI > 0 130 { PCI_VENDOR_ALI, -1, 131 NULL, agp_ali_attach }, 132 #endif 133 134 #if NAGP_AMD64 > 0 135 { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, 136 agp_amd64_match, agp_amd64_attach }, 137 #endif 138 139 #if NAGP_AMD > 0 140 { PCI_VENDOR_AMD, -1, 141 agp_amd_match, agp_amd_attach }, 142 #endif 143 144 #if NAGP_I810 > 0 145 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, 146 NULL, agp_i810_attach }, 147 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, 148 NULL, agp_i810_attach }, 149 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, 150 NULL, agp_i810_attach }, 151 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, 152 NULL, agp_i810_attach }, 153 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, 154 NULL, agp_i810_attach }, 155 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, 156 NULL, agp_i810_attach }, 157 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, 158 NULL, agp_i810_attach }, 159 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, 160 NULL, agp_i810_attach }, 161 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, 162 NULL, agp_i810_attach }, 163 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, 164 NULL, agp_i810_attach }, 165 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, 166 NULL, agp_i810_attach }, 167 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, 168 NULL, agp_i810_attach }, 169 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, 170 NULL, agp_i810_attach }, 171 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, 172 NULL, agp_i810_attach }, 173 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, 174 NULL, agp_i810_attach }, 175 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, 176 NULL, agp_i810_attach }, 177 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, 178 NULL, agp_i810_attach }, 179 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, 180 NULL, agp_i810_attach }, 181 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, 182 NULL, agp_i810_attach }, 183 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, 184 NULL, agp_i810_attach }, 185 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, 186 NULL, agp_i810_attach }, 187 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, 188 NULL, agp_i810_attach }, 189 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, 190 NULL, agp_i810_attach }, 191 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, 192 NULL, agp_i810_attach }, 193 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, 194 NULL, agp_i810_attach }, 195 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, 196 NULL, agp_i810_attach }, 197 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, 198 NULL, agp_i810_attach }, 199 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, 200 NULL, agp_i810_attach }, 201 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, 202 NULL, agp_i810_attach }, 203 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, 204 NULL, agp_i810_attach }, 205 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, 206 NULL, agp_i810_attach }, 207 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, 208 NULL, agp_i810_attach }, 209 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, 210 NULL, agp_i810_attach }, 211 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, 212 NULL, agp_i810_attach }, 213 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, 214 NULL, agp_i810_attach }, 215 { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, 216 NULL, agp_i810_attach }, 217 #endif 218 219 #if NAGP_INTEL > 0 220 { PCI_VENDOR_INTEL, -1, 221 NULL, agp_intel_attach }, 222 #endif 223 224 #if NAGP_AMD64 > 0 225 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, 226 agp_amd64_match, agp_amd64_attach }, 227 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, 228 agp_amd64_match, agp_amd64_attach }, 229 #endif 230 231 #if NAGP_NVIDIA > 0 232 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_PCHB, 233 NULL, agp_nvidia_attach }, 234 { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PCHB, 235 NULL, agp_nvidia_attach }, 236 #endif 237 238 #if NAGP_AMD64 > 0 239 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, 240 agp_amd64_match, agp_amd64_attach }, 241 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, 242 agp_amd64_match, agp_amd64_attach }, 243 #endif 244 245 #if NAGP_SIS > 0 246 { PCI_VENDOR_SIS, -1, 247 NULL, agp_sis_attach }, 248 #endif 249 250 #if NAGP_AMD64 > 0 251 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, 252 agp_amd64_match, agp_amd64_attach }, 253 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, 254 agp_amd64_match, agp_amd64_attach }, 255 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, 256 agp_amd64_match, agp_amd64_attach }, 257 { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, 258 agp_amd64_match, agp_amd64_attach }, 259 #endif 260 261 #if NAGP_VIA > 0 262 { PCI_VENDOR_VIATECH, -1, 263 NULL, agp_via_attach }, 264 #endif 265 266 { 0, 0, 267 NULL, NULL }, 268 }; 269 270 static const struct agp_product * 271 agp_lookup(const struct pci_attach_args *pa) 272 { 273 const struct agp_product *ap; 274 275 /* First find the vendor. */ 276 for (ap = agp_products; ap->ap_attach != NULL; ap++) { 277 if (PCI_VENDOR(pa->pa_id) == ap->ap_vendor) 278 break; 279 } 280 281 if (ap->ap_attach == NULL) 282 return (NULL); 283 284 /* Now find the product within the vendor's domain. */ 285 for (; ap->ap_attach != NULL; ap++) { 286 if (PCI_VENDOR(pa->pa_id) != ap->ap_vendor) { 287 /* Ran out of this vendor's section of the table. */ 288 return (NULL); 289 } 290 if (ap->ap_product == PCI_PRODUCT(pa->pa_id)) { 291 /* Exact match. */ 292 break; 293 } 294 if (ap->ap_product == (uint32_t) -1) { 295 /* Wildcard match. */ 296 break; 297 } 298 } 299 300 if (ap->ap_attach == NULL) 301 return (NULL); 302 303 /* Now let the product-specific driver filter the match. */ 304 if (ap->ap_match != NULL && (*ap->ap_match)(pa) == 0) 305 return (NULL); 306 307 return (ap); 308 } 309 310 static int 311 agpmatch(device_t parent, cfdata_t match, void *aux) 312 { 313 struct agpbus_attach_args *apa = aux; 314 struct pci_attach_args *pa = &apa->apa_pci_args; 315 316 if (agp_lookup(pa) == NULL) 317 return (0); 318 319 return (1); 320 } 321 322 static const u_int agp_max[][2] = { 323 {0, 0}, 324 {32, 4}, 325 {64, 28}, 326 {128, 96}, 327 {256, 204}, 328 {512, 440}, 329 {1024, 942}, 330 {2048, 1920}, 331 {4096, 3932} 332 }; 333 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 334 335 static void 336 agpattach(device_t parent, device_t self, void *aux) 337 { 338 struct agpbus_attach_args *apa = aux; 339 struct pci_attach_args *pa = &apa->apa_pci_args; 340 struct agp_softc *sc = device_private(self); 341 const struct agp_product *ap; 342 int ret; 343 u_int memsize, i; 344 345 ap = agp_lookup(pa); 346 KASSERT(ap != NULL); 347 348 aprint_naive(": AGP controller\n"); 349 350 sc->as_dev = self; 351 sc->as_dmat = pa->pa_dmat; 352 sc->as_pc = pa->pa_pc; 353 sc->as_tag = pa->pa_tag; 354 sc->as_id = pa->pa_id; 355 356 /* 357 * Work out an upper bound for agp memory allocation. This 358 * uses a heuristic table from the Linux driver. 359 */ 360 memsize = physmem >> (20 - PAGE_SHIFT); /* memsize is in MB */ 361 for (i = 0; i < agp_max_size; i++) { 362 if (memsize <= agp_max[i][0]) 363 break; 364 } 365 if (i == agp_max_size) 366 i = agp_max_size - 1; 367 sc->as_maxmem = agp_max[i][1] << 20U; 368 369 /* 370 * The mutex is used to prevent re-entry to 371 * agp_generic_bind_memory() since that function can sleep. 372 */ 373 mutex_init(&sc->as_mtx, MUTEX_DEFAULT, IPL_NONE); 374 375 TAILQ_INIT(&sc->as_memory); 376 377 ret = (*ap->ap_attach)(parent, self, pa); 378 if (ret == 0) 379 aprint_normal(": aperture at 0x%lx, size 0x%lx\n", 380 (unsigned long)sc->as_apaddr, 381 (unsigned long)AGP_GET_APERTURE(sc)); 382 else 383 sc->as_chipc = NULL; 384 385 if (!pmf_device_register(self, NULL, agp_resume)) 386 aprint_error_dev(self, "couldn't establish power handler\n"); 387 } 388 389 CFATTACH_DECL_NEW(agp, sizeof(struct agp_softc), 390 agpmatch, agpattach, NULL, NULL); 391 392 int 393 agp_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int reg) 394 { 395 /* 396 * Find the aperture. Don't map it (yet), this would 397 * eat KVA. 398 */ 399 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, 400 PCI_MAPREG_TYPE_MEM, &sc->as_apaddr, &sc->as_apsize, 401 &sc->as_apflags) != 0) 402 return ENXIO; 403 404 sc->as_apt = pa->pa_memt; 405 406 return 0; 407 } 408 409 struct agp_gatt * 410 agp_alloc_gatt(struct agp_softc *sc) 411 { 412 u_int32_t apsize = AGP_GET_APERTURE(sc); 413 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 414 struct agp_gatt *gatt; 415 void *virtual; 416 int dummyseg; 417 418 gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_WAITOK); 419 gatt->ag_entries = entries; 420 421 if (agp_alloc_dmamem(sc->as_dmat, entries * sizeof(u_int32_t), 422 0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical, 423 &gatt->ag_dmaseg, 1, &dummyseg) != 0) { 424 free(gatt, M_AGP); 425 return NULL; 426 } 427 gatt->ag_virtual = (uint32_t *)virtual; 428 429 gatt->ag_size = entries * sizeof(u_int32_t); 430 memset(gatt->ag_virtual, 0, gatt->ag_size); 431 agp_flush_cache(); 432 433 return gatt; 434 } 435 436 void 437 agp_free_gatt(struct agp_softc *sc, struct agp_gatt *gatt) 438 { 439 agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap, 440 (void *)gatt->ag_virtual, &gatt->ag_dmaseg, 1); 441 free(gatt, M_AGP); 442 } 443 444 445 int 446 agp_generic_detach(struct agp_softc *sc) 447 { 448 mutex_destroy(&sc->as_mtx); 449 agp_flush_cache(); 450 return 0; 451 } 452 453 static int 454 agpdev_match(const struct pci_attach_args *pa) 455 { 456 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 457 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 458 if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, 459 NULL, NULL)) 460 return 1; 461 462 return 0; 463 } 464 465 int 466 agp_generic_enable(struct agp_softc *sc, u_int32_t mode) 467 { 468 struct pci_attach_args pa; 469 pcireg_t tstatus, mstatus; 470 int capoff; 471 472 if (pci_find_device(&pa, agpdev_match) == 0 || 473 pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP, 474 &capoff, NULL) == 0) { 475 aprint_error_dev(sc->as_dev, "can't find display\n"); 476 return ENXIO; 477 } 478 479 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 480 sc->as_capoff + PCI_AGP_STATUS); 481 mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag, 482 capoff + PCI_AGP_STATUS); 483 484 if (AGP_MODE_GET_MODE_3(mode) && 485 AGP_MODE_GET_MODE_3(tstatus) && 486 AGP_MODE_GET_MODE_3(mstatus)) 487 return agp_generic_enable_v3(sc, &pa, capoff, mode); 488 else 489 return agp_generic_enable_v2(sc, &pa, capoff, mode); 490 } 491 492 static int 493 agp_generic_enable_v2(struct agp_softc *sc, const struct pci_attach_args *pa, 494 int capoff, u_int32_t mode) 495 { 496 pcireg_t tstatus, mstatus; 497 pcireg_t command; 498 int rq, sba, fw, rate; 499 500 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 501 sc->as_capoff + PCI_AGP_STATUS); 502 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 503 capoff + PCI_AGP_STATUS); 504 505 /* Set RQ to the min of mode, tstatus and mstatus */ 506 rq = AGP_MODE_GET_RQ(mode); 507 if (AGP_MODE_GET_RQ(tstatus) < rq) 508 rq = AGP_MODE_GET_RQ(tstatus); 509 if (AGP_MODE_GET_RQ(mstatus) < rq) 510 rq = AGP_MODE_GET_RQ(mstatus); 511 512 /* Set SBA if all three can deal with SBA */ 513 sba = (AGP_MODE_GET_SBA(tstatus) 514 & AGP_MODE_GET_SBA(mstatus) 515 & AGP_MODE_GET_SBA(mode)); 516 517 /* Similar for FW */ 518 fw = (AGP_MODE_GET_FW(tstatus) 519 & AGP_MODE_GET_FW(mstatus) 520 & AGP_MODE_GET_FW(mode)); 521 522 /* Figure out the max rate */ 523 rate = (AGP_MODE_GET_RATE(tstatus) 524 & AGP_MODE_GET_RATE(mstatus) 525 & AGP_MODE_GET_RATE(mode)); 526 if (rate & AGP_MODE_V2_RATE_4x) 527 rate = AGP_MODE_V2_RATE_4x; 528 else if (rate & AGP_MODE_V2_RATE_2x) 529 rate = AGP_MODE_V2_RATE_2x; 530 else 531 rate = AGP_MODE_V2_RATE_1x; 532 533 /* Construct the new mode word and tell the hardware */ 534 command = AGP_MODE_SET_RQ(0, rq); 535 command = AGP_MODE_SET_SBA(command, sba); 536 command = AGP_MODE_SET_FW(command, fw); 537 command = AGP_MODE_SET_RATE(command, rate); 538 command = AGP_MODE_SET_AGP(command, 1); 539 pci_conf_write(sc->as_pc, sc->as_tag, 540 sc->as_capoff + PCI_AGP_COMMAND, command); 541 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 542 command); 543 544 return 0; 545 } 546 547 static int 548 agp_generic_enable_v3(struct agp_softc *sc, const struct pci_attach_args *pa, 549 int capoff, u_int32_t mode) 550 { 551 pcireg_t tstatus, mstatus; 552 pcireg_t command; 553 int rq, sba, fw, rate, arqsz, cal; 554 555 tstatus = pci_conf_read(sc->as_pc, sc->as_tag, 556 sc->as_capoff + PCI_AGP_STATUS); 557 mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag, 558 capoff + PCI_AGP_STATUS); 559 560 /* Set RQ to the min of mode, tstatus and mstatus */ 561 rq = AGP_MODE_GET_RQ(mode); 562 if (AGP_MODE_GET_RQ(tstatus) < rq) 563 rq = AGP_MODE_GET_RQ(tstatus); 564 if (AGP_MODE_GET_RQ(mstatus) < rq) 565 rq = AGP_MODE_GET_RQ(mstatus); 566 567 /* 568 * ARQSZ - Set the value to the maximum one. 569 * Don't allow the mode register to override values. 570 */ 571 arqsz = AGP_MODE_GET_ARQSZ(mode); 572 if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz) 573 arqsz = AGP_MODE_GET_ARQSZ(tstatus); 574 if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz) 575 arqsz = AGP_MODE_GET_ARQSZ(mstatus); 576 577 /* Calibration cycle - don't allow override by mode register */ 578 cal = AGP_MODE_GET_CAL(tstatus); 579 if (AGP_MODE_GET_CAL(mstatus) < cal) 580 cal = AGP_MODE_GET_CAL(mstatus); 581 582 /* SBA must be supported for AGP v3. */ 583 sba = 1; 584 585 /* Set FW if all three support it. */ 586 fw = (AGP_MODE_GET_FW(tstatus) 587 & AGP_MODE_GET_FW(mstatus) 588 & AGP_MODE_GET_FW(mode)); 589 590 /* Figure out the max rate */ 591 rate = (AGP_MODE_GET_RATE(tstatus) 592 & AGP_MODE_GET_RATE(mstatus) 593 & AGP_MODE_GET_RATE(mode)); 594 if (rate & AGP_MODE_V3_RATE_8x) 595 rate = AGP_MODE_V3_RATE_8x; 596 else 597 rate = AGP_MODE_V3_RATE_4x; 598 599 /* Construct the new mode word and tell the hardware */ 600 command = AGP_MODE_SET_RQ(0, rq); 601 command = AGP_MODE_SET_ARQSZ(command, arqsz); 602 command = AGP_MODE_SET_CAL(command, cal); 603 command = AGP_MODE_SET_SBA(command, sba); 604 command = AGP_MODE_SET_FW(command, fw); 605 command = AGP_MODE_SET_RATE(command, rate); 606 command = AGP_MODE_SET_AGP(command, 1); 607 pci_conf_write(sc->as_pc, sc->as_tag, 608 sc->as_capoff + PCI_AGP_COMMAND, command); 609 pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + PCI_AGP_COMMAND, 610 command); 611 612 return 0; 613 } 614 615 struct agp_memory * 616 agp_generic_alloc_memory(struct agp_softc *sc, int type, vsize_t size) 617 { 618 struct agp_memory *mem; 619 620 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 621 return 0; 622 623 if (sc->as_allocated + size > sc->as_maxmem) 624 return 0; 625 626 if (type != 0) { 627 printf("agp_generic_alloc_memory: unsupported type %d\n", 628 type); 629 return 0; 630 } 631 632 mem = malloc(sizeof *mem, M_AGP, M_WAITOK); 633 if (mem == NULL) 634 return NULL; 635 636 if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1, 637 size, 0, BUS_DMA_NOWAIT, &mem->am_dmamap) != 0) { 638 free(mem, M_AGP); 639 return NULL; 640 } 641 642 mem->am_id = sc->as_nextid++; 643 mem->am_size = size; 644 mem->am_type = 0; 645 mem->am_physical = 0; 646 mem->am_offset = 0; 647 mem->am_is_bound = 0; 648 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 649 sc->as_allocated += size; 650 651 return mem; 652 } 653 654 int 655 agp_generic_free_memory(struct agp_softc *sc, struct agp_memory *mem) 656 { 657 if (mem->am_is_bound) 658 return EBUSY; 659 660 sc->as_allocated -= mem->am_size; 661 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 662 bus_dmamap_destroy(sc->as_dmat, mem->am_dmamap); 663 free(mem, M_AGP); 664 return 0; 665 } 666 667 int 668 agp_generic_bind_memory(struct agp_softc *sc, struct agp_memory *mem, 669 off_t offset) 670 { 671 672 return agp_generic_bind_memory_bounded(sc, mem, offset, 673 0, AGP_GET_APERTURE(sc)); 674 } 675 676 int 677 agp_generic_bind_memory_bounded(struct agp_softc *sc, struct agp_memory *mem, 678 off_t offset, off_t start, off_t end) 679 { 680 off_t i, k; 681 bus_size_t done, j; 682 int error; 683 bus_dma_segment_t *segs, *seg; 684 bus_addr_t pa; 685 int contigpages, nseg; 686 687 mutex_enter(&sc->as_mtx); 688 689 if (mem->am_is_bound) { 690 aprint_error_dev(sc->as_dev, "memory already bound\n"); 691 mutex_exit(&sc->as_mtx); 692 return EINVAL; 693 } 694 695 if (offset < start 696 || (offset & (AGP_PAGE_SIZE - 1)) != 0 697 || offset > end 698 || mem->am_size > (end - offset)) { 699 aprint_error_dev(sc->as_dev, 700 "binding memory at bad offset %#lx\n", 701 (unsigned long) offset); 702 mutex_exit(&sc->as_mtx); 703 return EINVAL; 704 } 705 706 /* 707 * XXXfvdl 708 * The memory here needs to be directly accessible from the 709 * AGP video card, so it should be allocated using bus_dma. 710 * However, it need not be contiguous, since individual pages 711 * are translated using the GATT. 712 * 713 * Using a large chunk of contiguous memory may get in the way 714 * of other subsystems that may need one, so we try to be friendly 715 * and ask for allocation in chunks of a minimum of 8 pages 716 * of contiguous memory on average, falling back to 4, 2 and 1 717 * if really needed. Larger chunks are preferred, since allocating 718 * a bus_dma_segment per page would be overkill. 719 */ 720 721 for (contigpages = 8; contigpages > 0; contigpages >>= 1) { 722 nseg = (mem->am_size / (contigpages * PAGE_SIZE)) + 1; 723 segs = malloc(nseg * sizeof *segs, M_AGP, M_WAITOK); 724 if (segs == NULL) { 725 mutex_exit(&sc->as_mtx); 726 return ENOMEM; 727 } 728 if (bus_dmamem_alloc(sc->as_dmat, mem->am_size, PAGE_SIZE, 0, 729 segs, nseg, &mem->am_nseg, 730 contigpages > 1 ? 731 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) != 0) { 732 free(segs, M_AGP); 733 continue; 734 } 735 if (bus_dmamem_map(sc->as_dmat, segs, mem->am_nseg, 736 mem->am_size, &mem->am_virtual, BUS_DMA_WAITOK) != 0) { 737 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 738 free(segs, M_AGP); 739 continue; 740 } 741 if (bus_dmamap_load(sc->as_dmat, mem->am_dmamap, 742 mem->am_virtual, mem->am_size, NULL, BUS_DMA_WAITOK) != 0) { 743 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 744 mem->am_size); 745 bus_dmamem_free(sc->as_dmat, segs, mem->am_nseg); 746 free(segs, M_AGP); 747 continue; 748 } 749 mem->am_dmaseg = segs; 750 break; 751 } 752 753 if (contigpages == 0) { 754 mutex_exit(&sc->as_mtx); 755 return ENOMEM; 756 } 757 758 759 /* 760 * Bind the individual pages and flush the chipset's 761 * TLB. 762 */ 763 done = 0; 764 for (i = 0; i < mem->am_dmamap->dm_nsegs; i++) { 765 seg = &mem->am_dmamap->dm_segs[i]; 766 /* 767 * Install entries in the GATT, making sure that if 768 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 769 * aligned to PAGE_SIZE, we don't modify too many GATT 770 * entries. 771 */ 772 for (j = 0; j < seg->ds_len && (done + j) < mem->am_size; 773 j += AGP_PAGE_SIZE) { 774 pa = seg->ds_addr + j; 775 AGP_DPF(("binding offset %#lx to pa %#lx\n", 776 (unsigned long)(offset + done + j), 777 (unsigned long)pa)); 778 error = AGP_BIND_PAGE(sc, offset + done + j, pa); 779 if (error) { 780 /* 781 * Bail out. Reverse all the mappings 782 * and unwire the pages. 783 */ 784 for (k = 0; k < done + j; k += AGP_PAGE_SIZE) 785 AGP_UNBIND_PAGE(sc, offset + k); 786 787 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 788 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, 789 mem->am_size); 790 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, 791 mem->am_nseg); 792 free(mem->am_dmaseg, M_AGP); 793 mutex_exit(&sc->as_mtx); 794 return error; 795 } 796 } 797 done += seg->ds_len; 798 } 799 800 /* 801 * Flush the CPU cache since we are providing a new mapping 802 * for these pages. 803 */ 804 agp_flush_cache(); 805 806 /* 807 * Make sure the chipset gets the new mappings. 808 */ 809 AGP_FLUSH_TLB(sc); 810 811 mem->am_offset = offset; 812 mem->am_is_bound = 1; 813 814 mutex_exit(&sc->as_mtx); 815 816 return 0; 817 } 818 819 int 820 agp_generic_unbind_memory(struct agp_softc *sc, struct agp_memory *mem) 821 { 822 int i; 823 824 mutex_enter(&sc->as_mtx); 825 826 if (!mem->am_is_bound) { 827 aprint_error_dev(sc->as_dev, "memory is not bound\n"); 828 mutex_exit(&sc->as_mtx); 829 return EINVAL; 830 } 831 832 833 /* 834 * Unbind the individual pages and flush the chipset's 835 * TLB. Unwire the pages so they can be swapped. 836 */ 837 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 838 AGP_UNBIND_PAGE(sc, mem->am_offset + i); 839 840 agp_flush_cache(); 841 AGP_FLUSH_TLB(sc); 842 843 bus_dmamap_unload(sc->as_dmat, mem->am_dmamap); 844 bus_dmamem_unmap(sc->as_dmat, mem->am_virtual, mem->am_size); 845 bus_dmamem_free(sc->as_dmat, mem->am_dmaseg, mem->am_nseg); 846 847 free(mem->am_dmaseg, M_AGP); 848 849 mem->am_offset = 0; 850 mem->am_is_bound = 0; 851 852 mutex_exit(&sc->as_mtx); 853 854 return 0; 855 } 856 857 /* Helper functions for implementing user/kernel api */ 858 859 static int 860 agp_acquire_helper(struct agp_softc *sc, enum agp_acquire_state state) 861 { 862 if (sc->as_state != AGP_ACQUIRE_FREE) 863 return EBUSY; 864 sc->as_state = state; 865 866 return 0; 867 } 868 869 static int 870 agp_release_helper(struct agp_softc *sc, enum agp_acquire_state state) 871 { 872 873 if (sc->as_state == AGP_ACQUIRE_FREE) 874 return 0; 875 876 if (sc->as_state != state) 877 return EBUSY; 878 879 sc->as_state = AGP_ACQUIRE_FREE; 880 return 0; 881 } 882 883 static struct agp_memory * 884 agp_find_memory(struct agp_softc *sc, int id) 885 { 886 struct agp_memory *mem; 887 888 AGP_DPF(("searching for memory block %d\n", id)); 889 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 890 AGP_DPF(("considering memory block %d\n", mem->am_id)); 891 if (mem->am_id == id) 892 return mem; 893 } 894 return 0; 895 } 896 897 /* Implementation of the userland ioctl api */ 898 899 static int 900 agp_info_user(struct agp_softc *sc, agp_info *info) 901 { 902 memset(info, 0, sizeof *info); 903 info->bridge_id = sc->as_id; 904 if (sc->as_capoff != 0) 905 info->agp_mode = pci_conf_read(sc->as_pc, sc->as_tag, 906 sc->as_capoff + PCI_AGP_STATUS); 907 else 908 info->agp_mode = 0; /* i810 doesn't have real AGP */ 909 info->aper_base = sc->as_apaddr; 910 info->aper_size = AGP_GET_APERTURE(sc) >> 20; 911 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 912 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 913 914 return 0; 915 } 916 917 static int 918 agp_setup_user(struct agp_softc *sc, agp_setup *setup) 919 { 920 return AGP_ENABLE(sc, setup->agp_mode); 921 } 922 923 static int 924 agp_allocate_user(struct agp_softc *sc, agp_allocate *alloc) 925 { 926 struct agp_memory *mem; 927 928 mem = AGP_ALLOC_MEMORY(sc, 929 alloc->type, 930 alloc->pg_count << AGP_PAGE_SHIFT); 931 if (mem) { 932 alloc->key = mem->am_id; 933 alloc->physical = mem->am_physical; 934 return 0; 935 } else { 936 return ENOMEM; 937 } 938 } 939 940 static int 941 agp_deallocate_user(struct agp_softc *sc, int id) 942 { 943 struct agp_memory *mem = agp_find_memory(sc, id); 944 945 if (mem) { 946 AGP_FREE_MEMORY(sc, mem); 947 return 0; 948 } else { 949 return ENOENT; 950 } 951 } 952 953 static int 954 agp_bind_user(struct agp_softc *sc, agp_bind *bind) 955 { 956 struct agp_memory *mem = agp_find_memory(sc, bind->key); 957 958 if (!mem) 959 return ENOENT; 960 961 return AGP_BIND_MEMORY(sc, mem, bind->pg_start << AGP_PAGE_SHIFT); 962 } 963 964 static int 965 agp_unbind_user(struct agp_softc *sc, agp_unbind *unbind) 966 { 967 struct agp_memory *mem = agp_find_memory(sc, unbind->key); 968 969 if (!mem) 970 return ENOENT; 971 972 return AGP_UNBIND_MEMORY(sc, mem); 973 } 974 975 static int 976 agpopen(dev_t dev, int oflags, int devtype, struct lwp *l) 977 { 978 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 979 980 if (sc == NULL) 981 return ENXIO; 982 983 if (sc->as_chipc == NULL) 984 return ENXIO; 985 986 if (!sc->as_isopen) 987 sc->as_isopen = 1; 988 else 989 return EBUSY; 990 991 return 0; 992 } 993 994 static int 995 agpclose(dev_t dev, int fflag, int devtype, struct lwp *l) 996 { 997 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 998 struct agp_memory *mem; 999 1000 if (sc == NULL) 1001 return ENODEV; 1002 1003 /* 1004 * Clear the GATT and force release on last close 1005 */ 1006 if (sc->as_state == AGP_ACQUIRE_USER) { 1007 while ((mem = TAILQ_FIRST(&sc->as_memory))) { 1008 if (mem->am_is_bound) { 1009 printf("agpclose: mem %d is bound\n", 1010 mem->am_id); 1011 AGP_UNBIND_MEMORY(sc, mem); 1012 } 1013 /* 1014 * XXX it is not documented, but if the protocol allows 1015 * allocate->acquire->bind, it would be possible that 1016 * memory ranges are allocated by the kernel here, 1017 * which we shouldn't free. We'd have to keep track of 1018 * the memory range's owner. 1019 * The kernel API is unsed yet, so we get away with 1020 * freeing all. 1021 */ 1022 AGP_FREE_MEMORY(sc, mem); 1023 } 1024 agp_release_helper(sc, AGP_ACQUIRE_USER); 1025 } 1026 sc->as_isopen = 0; 1027 1028 return 0; 1029 } 1030 1031 static int 1032 agpioctl(dev_t dev, u_long cmd, void *data, int fflag, struct lwp *l) 1033 { 1034 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1035 1036 if (sc == NULL) 1037 return ENODEV; 1038 1039 if ((fflag & FWRITE) == 0 && cmd != AGPIOC_INFO) 1040 return EPERM; 1041 1042 switch (cmd) { 1043 case AGPIOC_INFO: 1044 return agp_info_user(sc, (agp_info *) data); 1045 1046 case AGPIOC_ACQUIRE: 1047 return agp_acquire_helper(sc, AGP_ACQUIRE_USER); 1048 1049 case AGPIOC_RELEASE: 1050 return agp_release_helper(sc, AGP_ACQUIRE_USER); 1051 1052 case AGPIOC_SETUP: 1053 return agp_setup_user(sc, (agp_setup *)data); 1054 1055 #ifdef __x86_64__ 1056 { 1057 /* 1058 * Handle paddr_t change from 32 bit for non PAE kernels 1059 * to 64 bit. 1060 */ 1061 #define AGPIOC_OALLOCATE _IOWR(AGPIOC_BASE, 6, agp_oallocate) 1062 1063 typedef struct _agp_oallocate { 1064 int key; /* tag of allocation */ 1065 size_t pg_count; /* number of pages */ 1066 uint32_t type; /* 0 == normal, other devspec */ 1067 u_long physical; /* device specific (some devices 1068 * need a phys address of the 1069 * actual page behind the gatt 1070 * table) */ 1071 } agp_oallocate; 1072 1073 case AGPIOC_OALLOCATE: { 1074 int ret; 1075 agp_allocate aga; 1076 agp_oallocate *oaga = data; 1077 1078 aga.type = oaga->type; 1079 aga.pg_count = oaga->pg_count; 1080 1081 if ((ret = agp_allocate_user(sc, &aga)) == 0) { 1082 oaga->key = aga.key; 1083 oaga->physical = (u_long)aga.physical; 1084 } 1085 1086 return ret; 1087 } 1088 } 1089 #endif 1090 case AGPIOC_ALLOCATE: 1091 return agp_allocate_user(sc, (agp_allocate *)data); 1092 1093 case AGPIOC_DEALLOCATE: 1094 return agp_deallocate_user(sc, *(int *) data); 1095 1096 case AGPIOC_BIND: 1097 return agp_bind_user(sc, (agp_bind *)data); 1098 1099 case AGPIOC_UNBIND: 1100 return agp_unbind_user(sc, (agp_unbind *)data); 1101 1102 } 1103 1104 return EINVAL; 1105 } 1106 1107 static paddr_t 1108 agpmmap(dev_t dev, off_t offset, int prot) 1109 { 1110 struct agp_softc *sc = device_lookup_private(&agp_cd, AGPUNIT(dev)); 1111 1112 if (sc == NULL) 1113 return ENODEV; 1114 1115 if (offset > AGP_GET_APERTURE(sc)) 1116 return -1; 1117 1118 return (bus_space_mmap(sc->as_apt, sc->as_apaddr, offset, prot, 1119 BUS_SPACE_MAP_LINEAR)); 1120 } 1121 1122 const struct cdevsw agp_cdevsw = { 1123 .d_open = agpopen, 1124 .d_close = agpclose, 1125 .d_read = noread, 1126 .d_write = nowrite, 1127 .d_ioctl = agpioctl, 1128 .d_stop = nostop, 1129 .d_tty = notty, 1130 .d_poll = nopoll, 1131 .d_mmap = agpmmap, 1132 .d_kqfilter = nokqfilter, 1133 .d_discard = nodiscard, 1134 .d_flag = D_OTHER 1135 }; 1136 1137 /* Implementation of the kernel api */ 1138 1139 void * 1140 agp_find_device(int unit) 1141 { 1142 return device_lookup_private(&agp_cd, unit); 1143 } 1144 1145 enum agp_acquire_state 1146 agp_state(void *devcookie) 1147 { 1148 struct agp_softc *sc = devcookie; 1149 1150 return sc->as_state; 1151 } 1152 1153 void 1154 agp_get_info(void *devcookie, struct agp_info *info) 1155 { 1156 struct agp_softc *sc = devcookie; 1157 1158 info->ai_mode = pci_conf_read(sc->as_pc, sc->as_tag, 1159 sc->as_capoff + PCI_AGP_STATUS); 1160 info->ai_aperture_base = sc->as_apaddr; 1161 info->ai_aperture_size = sc->as_apsize; /* XXXfvdl inconsistent */ 1162 info->ai_memory_allowed = sc->as_maxmem; 1163 info->ai_memory_used = sc->as_allocated; 1164 info->ai_devid = sc->as_id; 1165 } 1166 1167 int 1168 agp_acquire(void *dev) 1169 { 1170 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 1171 } 1172 1173 int 1174 agp_release(void *dev) 1175 { 1176 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 1177 } 1178 1179 int 1180 agp_enable(void *dev, u_int32_t mode) 1181 { 1182 struct agp_softc *sc = dev; 1183 1184 return AGP_ENABLE(sc, mode); 1185 } 1186 1187 void * 1188 agp_alloc_memory(void *dev, int type, vsize_t bytes) 1189 { 1190 struct agp_softc *sc = dev; 1191 1192 return (void *)AGP_ALLOC_MEMORY(sc, type, bytes); 1193 } 1194 1195 void 1196 agp_free_memory(void *dev, void *handle) 1197 { 1198 struct agp_softc *sc = dev; 1199 struct agp_memory *mem = handle; 1200 1201 AGP_FREE_MEMORY(sc, mem); 1202 } 1203 1204 int 1205 agp_bind_memory(void *dev, void *handle, off_t offset) 1206 { 1207 struct agp_softc *sc = dev; 1208 struct agp_memory *mem = handle; 1209 1210 return AGP_BIND_MEMORY(sc, mem, offset); 1211 } 1212 1213 int 1214 agp_unbind_memory(void *dev, void *handle) 1215 { 1216 struct agp_softc *sc = dev; 1217 struct agp_memory *mem = handle; 1218 1219 return AGP_UNBIND_MEMORY(sc, mem); 1220 } 1221 1222 void 1223 agp_memory_info(void *dev, void *handle, struct agp_memory_info *mi) 1224 { 1225 struct agp_memory *mem = handle; 1226 1227 mi->ami_size = mem->am_size; 1228 mi->ami_physical = mem->am_physical; 1229 mi->ami_offset = mem->am_offset; 1230 mi->ami_is_bound = mem->am_is_bound; 1231 } 1232 1233 int 1234 agp_alloc_dmamem(bus_dma_tag_t tag, size_t size, int flags, 1235 bus_dmamap_t *mapp, void **vaddr, bus_addr_t *baddr, 1236 bus_dma_segment_t *seg, int nseg, int *rseg) 1237 1238 { 1239 int error, level = 0; 1240 1241 if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, 1242 seg, nseg, rseg, BUS_DMA_NOWAIT)) != 0) 1243 goto out; 1244 level++; 1245 1246 if ((error = bus_dmamem_map(tag, seg, *rseg, size, vaddr, 1247 BUS_DMA_NOWAIT | flags)) != 0) 1248 goto out; 1249 level++; 1250 1251 if ((error = bus_dmamap_create(tag, size, *rseg, size, 0, 1252 BUS_DMA_NOWAIT, mapp)) != 0) 1253 goto out; 1254 level++; 1255 1256 if ((error = bus_dmamap_load(tag, *mapp, *vaddr, size, NULL, 1257 BUS_DMA_NOWAIT)) != 0) 1258 goto out; 1259 1260 *baddr = (*mapp)->dm_segs[0].ds_addr; 1261 1262 return 0; 1263 out: 1264 switch (level) { 1265 case 3: 1266 bus_dmamap_destroy(tag, *mapp); 1267 /* FALLTHROUGH */ 1268 case 2: 1269 bus_dmamem_unmap(tag, *vaddr, size); 1270 /* FALLTHROUGH */ 1271 case 1: 1272 bus_dmamem_free(tag, seg, *rseg); 1273 break; 1274 default: 1275 break; 1276 } 1277 1278 return error; 1279 } 1280 1281 void 1282 agp_free_dmamem(bus_dma_tag_t tag, size_t size, bus_dmamap_t map, 1283 void *vaddr, bus_dma_segment_t *seg, int nseg) 1284 { 1285 bus_dmamap_unload(tag, map); 1286 bus_dmamap_destroy(tag, map); 1287 bus_dmamem_unmap(tag, vaddr, size); 1288 bus_dmamem_free(tag, seg, nseg); 1289 } 1290 1291 static bool 1292 agp_resume(device_t dv, const pmf_qual_t *qual) 1293 { 1294 agp_flush_cache(); 1295 1296 return true; 1297 } 1298
Indexes created Tue Jun 23 00:25:03 UTC 2026