| /src/sys/external/bsd/drm2/dist/drm/ |
| drm_dsc.c | 100 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >>
109 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK);
279 vdsc_cfg->bits_per_pixel,
288 vdsc_cfg->bits_per_pixel,
323 vdsc_cfg->bits_per_pixel + 8) / 16 + num_extra_mux_bits;
373 * DSC spec mentions that bits_per_pixel specifies the target
379 vdsc_cfg->bits_per_pixel, 16) +
382 hrd_delay = DIV_ROUND_UP((rbs_min * 16), vdsc_cfg->bits_per_pixel);
383 vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16;
|
| drm_fb_helper.c | 1221 return var_1->bits_per_pixel == var_2->bits_per_pixel &&
1323 if (var->bits_per_pixel > fb->format->cpp[0] * 8 ||
1328 var->xres, var->yres, var->bits_per_pixel,
1349 * Likewise, bits_per_pixel should be rounded up to a supported value.
1351 var->bits_per_pixel = fb->format->cpp[0] * 8;
1692 info->var.bits_per_pixel = fb->format->cpp[0] * 8;
|
| /src/sys/dev/scsipi/ |
| scsi_scanner.h | 85 u_int8_t bits_per_pixel; member in struct:scsi_window_data
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_dsc.c | 164 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bytes_per_pixel);
185 config->dc_dsc_cfg.bits_per_pixel,
186 config->dc_dsc_cfg.bits_per_pixel / 16,
187 ((config->dc_dsc_cfg.bits_per_pixel % 16) * 10000) / 16);
282 int bits_per_pixel = pps->bits_per_pixel; local in function:dsc_log_pps
292 DC_LOG_DSC("\tbits_per_pixel %d (%d.%04d)", bits_per_pixel, bits_per_pixel / 16, ((bits_per_pixel % 16) * 10000) / 16);
349 ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.937
[all...] |
| amdgpu_dcn20_resource.c | 2055 pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.bits_per_pixel / 16.0;
|
| /src/sys/external/bsd/drm2/dist/drm/vboxvideo/ |
| modesetting.c | 51 p->bits_per_pixel = bpp;
|
| vboxvideo.h | 288 u16 bits_per_pixel; member in struct:vbva_infoscreen
|
| /src/sys/arch/xen/xen/ |
| genfb_xen.c | 85 _xen_genfb_btinfo.depth = d0_consi->u.vesa_lfb.bits_per_pixel;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/ |
| amdgpu_rc_calc_dpi.c | 51 to->bits_per_pixel = from->bits_per_pixel;
114 float bpp = ((float) pps->bits_per_pixel / 16.0);
129 /* in native_422 or native_420 modes, the bits_per_pixel is double the target bpp
|
| amdgpu_dc_dsc.c | 47 kbps = (timing->pix_clk_100hz * timing->dsc_cfg.bits_per_pixel);
556 * dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g.
558 * dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0);
606 dsc_cfg->bits_per_pixel = target_bpp;
|
| /src/sys/external/bsd/drm2/dist/drm/vmwgfx/ |
| vmwgfx_fb.c | 109 int depth = var->bits_per_pixel;
113 switch (var->bits_per_pixel) {
118 DRM_ERROR("Bad bpp %u.\n", var->bits_per_pixel);
155 var->xres * var->bits_per_pixel/8,
432 switch (var->bits_per_pixel) {
437 DRM_ERROR("Bad bpp %u.\n", var->bits_per_pixel);
520 mode_cmd.pitches[0] = ((var->bits_per_pixel + 7) / 8) * mode_cmd.width;
522 drm_mode_legacy_fb_format(var->bits_per_pixel, depth);
587 DIV_ROUND_UP(var->bits_per_pixel, 8),
731 info->var.bits_per_pixel = fb_bpp
[all...] |
| /src/sys/external/bsd/drm2/dist/include/drm/ |
| drm_dsc.h | 128 * @bits_per_pixel:
129 * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
131 u16 bits_per_pixel; member in struct:drm_dsc_config
321 * compressed BPP bits_per_pixel[9:0] syntax element.
335 * the compressed BPP bits_per_pixel[9:0] element.
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| nouveau_nv50_fbcon.c | 105 uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
163 switch (info->var.bits_per_pixel) {
|
| nouveau_nvc0_fbcon.c | 105 uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
168 switch (info->var.bits_per_pixel) {
|
| nouveau_nv04_fbcon.c | 148 switch (info->var.bits_per_pixel) {
|
| /src/sys/dev/pci/ |
| machfb.c | 123 int bits_per_pixel; member in struct:mach64_softc
697 sc->bits_per_pixel = 8;
703 (sc->stride * (sc->bits_per_pixel / 8)) - 1;
715 sc->bits_per_pixel);
828 ri->ri_depth = sc->bits_per_pixel;
907 if (sc->bits_per_pixel == 8)
1087 switch (sc->bits_per_pixel) {
1179 if (sc->bits_per_pixel == 24)
1236 switch (sc->bits_per_pixel) {
1264 offset = ((x + y * sc->stride) * (sc->bits_per_pixel >> 3)) >> 3
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_vdsc.c | 406 vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
544 pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel);
941 vdsc_cfg->bits_per_pixel = val;
942 crtc_state->dsc.compressed_bpp = vdsc_cfg->bits_per_pixel >> 4;
|
| intel_dp.c | 516 u32 bits_per_pixel, max_bpp_small_joiner_ram; local in function:intel_dp_dsc_get_output_bpp
525 bits_per_pixel = (link_clock * lane_count * 8) /
527 DRM_DEBUG_KMS("Max link bpp: %u\n", bits_per_pixel);
538 bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
541 if (bits_per_pixel < valid_dsc_bpp[0]) {
543 bits_per_pixel, valid_dsc_bpp[0]);
549 if (bits_per_pixel < valid_dsc_bpp[i + 1])
552 bits_per_pixel = valid_dsc_bpp[i];
558 return bits_per_pixel << 4
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dc_hw_types.h | 707 uint32_t bits_per_pixel; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */ member in struct:dc_dsc_config
|
| /src/sys/external/mit/xen-include-public/dist/xen/include/public/ |
| xen.h | 911 uint16_t bits_per_pixel; member in struct:dom0_vga_console_info::__anon457d4c9c060a::__anon457d4c9c0808
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_mst_types.c | 561 params[i].timing->dsc_cfg.bits_per_pixel = vars[i].bpp_x16;
580 return dsc_config.bits_per_pixel;
|
| amdgpu_dm.c | 5027 bpp = stream->timing.dsc_cfg.bits_per_pixel;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc_stream.c | 117 stream->timing.dsc_cfg.bits_per_pixel = 128;
|
| amdgpu_dc_link.c | 3200 kbps = (timing->pix_clk_100hz * timing->dsc_cfg.bits_per_pixel);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_mem_input_v.c | 536 enum bits_per_pixel { enum in function:get_dvmm_hw_setting
|
