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    Searched refs:buildBuildVector (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
CallLowering.cpp 420 B.buildBuildVector(OrigRegs[0], Regs);
437 B.buildBuildVector(OrigRegs[0], EltMerges);
442 auto BV = B.buildBuildVector(BVType, Regs);
LegalizerHelper.cpp 215 MIRBuilder.buildBuildVector(DstReg, PartRegs);
818 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2565 auto NewVec = MIRBuilder.buildBuildVector(MidTy, NewOps);
3438 MIRBuilder.buildBuildVector(DstReg, DstRegs);
3505 MIRBuilder.buildBuildVector(DstReg, DstRegs);
3577 MIRBuilder.buildBuildVector(DstReg, DstRegs);
4936 MIRBuilder.buildBuildVector(DstReg, DstRegs);
5013 MIRBuilder.buildBuildVector(DstReg, DstRegs);
6336 MIRBuilder.buildBuildVector(DstReg, BuildVec);
IRTranslator.cpp 2913 EntryBuilder->buildBuildVector(Reg, Ops);
2924 EntryBuilder->buildBuildVector(Reg, Ops);
2941 EntryBuilder->buildBuildVector(Reg, Ops);
MachineIRBuilder.cpp 634 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res,
CombinerHelper.cpp 237 Builder.buildBuildVector(NewDstReg, Ops);
2848 Builder.buildBuildVector(MI.getOperand(0).getReg(), MatchInfo);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULegalizerInfo.cpp 2506 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0);
3597 return B.buildBuildVector(LLT::vector(NumElts, S32), WideRegs).getReg(0);
3606 return B.buildBuildVector(LLT::vector(2, S32), PackedRegs).getReg(0);
3615 Reg = B.buildBuildVector(LLT::vector(6, S16), PackedRegs).getReg(0);
3626 return B.buildBuildVector(LLT::vector(4, S32), PackedRegs).getReg(0);
4049 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)})
4053 B.buildBuildVector(
4088 auto VAddr = B.buildBuildVector(LLT::vector(NumAddrRegs, 32), AddrRegs);
4185 auto Concat = B.buildBuildVector(PackedTy, {VData0, VData1});
4459 B.buildBuildVector(DstReg, ResultRegs)
    [all...]
AMDGPURegisterBankInfo.cpp 985 auto Merge = B.buildBuildVector(OpTy, ReadlanePieces);
2055 B.buildBuildVector(MI.getOperand(0), Ops);
2057 auto Vec = B.buildBuildVector(MergeTy, Ops);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 960 MachineInstrBuilder buildBuildVector(const DstOp &Res,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.cpp 423 .buildBuildVector({NewLLT}, {CurVReg, Undef.getReg(0)})

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