HomeSort by: relevance | last modified time | path
    Searched refs:buildInstrNoInsert (Results 1 - 13 of 13) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVCallLowering.cpp 28 MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(RISCV::PseudoRET);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86CallLowering.cpp 138 auto MIB = MIRBuilder.buildInstrNoInsert(X86::RET).addImm(0);
312 auto MIB = MIRBuilder.buildInstrNoInsert(CallOpc)
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMCallLowering.cpp 216 auto Ret = MIRBuilder.buildInstrNoInsert(Opcode).add(predOps(ARMCC::AL));
472 auto MIB = MIRBuilder.buildInstrNoInsert(CallOpcode);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
RegBankSelect.cpp 164 MI = MIRBuilder.buildInstrNoInsert(TargetOpcode::COPY)
194 MIRBuilder.buildInstrNoInsert(MergeOp)
203 MIRBuilder.buildInstrNoInsert(TargetOpcode::G_UNMERGE_VALUES);
InlineAsmLowering.cpp 354 auto Inst = MIRBuilder.buildInstrNoInsert(TargetOpcode::INLINEASM)
MachineIRBuilder.cpp 40 MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) {
100 auto MIB = buildInstrNoInsert(TargetOpcode::DBG_VALUE);
CombinerHelper.cpp 3747 auto NewPhi = Builder.buildInstrNoInsert(TargetOpcode::G_PHI);
IRTranslator.cpp 2156 MIRBuilder.buildInstrNoInsert(TargetOpcode::LOCAL_ESCAPE)
LegalizerHelper.cpp 3356 NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())
3364 NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.cpp 344 auto MIB = MIRBuilder.buildInstrNoInsert(AArch64::RET_ReallyLR);
915 auto MIB = MIRBuilder.buildInstrNoInsert(Opc);
1090 auto MIB = MIRBuilder.buildInstrNoInsert(Opc);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsCallLowering.cpp 381 MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
533 MachineInstrBuilder MIB = MIRBuilder.buildInstrNoInsert(
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUCallLowering.cpp 373 auto Ret = B.buildInstrNoInsert(ReturnOpc);
1126 auto MIB = MIRBuilder.buildInstrNoInsert(Opc);
1303 auto MIB = MIRBuilder.buildInstrNoInsert(Opc);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 376 return insertInstr(buildInstrNoInsert(Opcode));
384 MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);

Completed in 56 milliseconds