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    Searched refs:buildLShr (Results 1 - 6 of 6) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
LegalizerHelper.cpp 1537 auto Shr = MIRBuilder.buildLShr(SrcTy, SrcReg, ShiftAmt);
1666 auto LShr = MIRBuilder.buildLShr(
1822 : MIRBuilder.buildLShr(WideTy, WideInst, ShiftK);
1975 MIRBuilder.buildLShr(ShrReg, DstExt, ShiftAmtReg);
1994 auto Shift = MIRBuilder.buildLShr(WideTy, DstExt, ShiftAmt);
2598 auto ScaledIdx = MIRBuilder.buildLShr(IdxTy, Idx, Log2Ratio);
2611 auto ExtractedBits = MIRBuilder.buildLShr(NewEltTy, WideElt, OffsetBits);
2690 auto ScaledIdx = MIRBuilder.buildLShr(IdxTy, Idx, Log2Ratio);
2835 auto SmallVal = MIRBuilder.buildLShr(ExtendTy, ExtVal, ShiftAmt);
4381 auto OrRHS = MIRBuilder.buildLShr(
    [all...]
CombinerHelper.cpp 2219 Narrowed = Builder.buildLShr(HalfTy, Narrowed,
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsLegalizerInfo.cpp 380 auto Shift = MIRBuilder.buildLShr(s32, Val, C_P2Half_InBits);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
MachineIRBuilder.h 1490 MachineInstrBuilder buildLShr(const DstOp &Dst, const SrcOp &Src0,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPULegalizerInfo.cpp 2740 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0);
AMDGPURegisterBankInfo.cpp 1620 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16));

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