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    Searched refs:cfg2 (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/arch/evbarm/iyonix/
autoconf.c 114 prop_number_t cfg1, cfg2, swdpin; local
123 cfg2 = prop_number_create_integer(0);
124 KASSERT(cfg2 != NULL);
132 SETPROP("i82543-cfg2", cfg2);
  /src/sys/arch/iyonix/iyonix/
autoconf.c 114 prop_number_t cfg1, cfg2, swdpin; local
123 cfg2 = prop_number_create_integer(0);
124 KASSERT(cfg2 != NULL);
132 SETPROP("i82543-cfg2", cfg2);
  /src/sys/arch/mips/mips/
cache.c 1271 uint32_t cfg2 = mipsNN_cp0_config2_read(); local
1273 switch (MIPSNN_GET(CFG2_SL, cfg2)) {
1279 mci->mci_sdcache_line_size = MIPSNN_CFG2_SL(cfg2);
1281 mci->mci_sdcache_line_size * MIPSNN_CFG2_SS(cfg2);
1282 mci->mci_sdcache_ways = MIPSNN_CFG2_SA(cfg2) + 1;
1310 switch (MIPSNN_GET(CFG2_TL, cfg2)) {
1314 mci->mci_tcache_line_size = MIPSNN_CFG2_TL(cfg2);
1316 mci->mci_tcache_line_size * MIPSNN_CFG2_TS(cfg2);
1317 mci->mci_tcache_ways = MIPSNN_CFG2_TA(cfg2) + 1;
  /src/sys/dev/pci/
if_et.c 451 uint32_t cfg1, cfg2, ctrl; local
479 cfg2 = CSR_READ_4(sc, ET_MAC_CFG2);
480 cfg2 &= ~(ET_MAC_CFG2_MODE_MII | ET_MAC_CFG2_MODE_GMII |
482 cfg2 |= ET_MAC_CFG2_LENCHK | ET_MAC_CFG2_CRC | ET_MAC_CFG2_PADCRC |
487 cfg2 |= ET_MAC_CFG2_MODE_GMII;
489 cfg2 |= ET_MAC_CFG2_MODE_MII;
494 cfg2 |= ET_MAC_CFG2_FDX;
516 CSR_WRITE_4(sc, ET_MAC_CFG2, cfg2);
if_wm.c 2027 uint16_t cfg1, cfg2, swdpin, nvmword; local
2795 pn = prop_dictionary_get(dict, "i82543-cfg2");
2798 cfg2 = (uint16_t) prop_number_signed_value(pn);
2800 if (wm_nvm_read(sc, NVM_OFF_CFG2, 1, &cfg2)) {
2801 aprint_error_dev(sc->sc_dev, "unable to read CFG2\n");
2817 eeprom_data = cfg2;
2985 ((cfg2 >> NVM_CFG2_SWDPIO_SHIFT) & 0xf) <<
16043 DPRINTF(sc, WM_DEBUG_MANAGE, ("%s: FACTPS = %08x, CFG2=%04x\n",
  /src/sys/dev/ic/
rtsx.c 1384 uint8_t cfg2; local
1396 cfg2 = RTSX_SD_NO_CHECK_WAIT_CRC_TO | RTSX_SD_CHECK_CRC16 |
1404 cfg2 |= RTSX_SD_CALCULATE_CRC7 | RTSX_SD_CHECK_CRC7;
1411 cfg2 |= RTSX_SD_NO_CALCULATE_CRC7 | RTSX_SD_NO_CHECK_CRC7;
1420 0xff, cfg2);

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