/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
cl006b.h | 9 __u8 chid; member in struct:nv03_channel_dma_v0
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cl506e.h | 9 __u8 chid; member in struct:nv50_channel_dma_v0
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cl506f.h | 9 __u8 chid; member in struct:nv50_channel_gpfifo_v0
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cl826e.h | 9 __u8 chid; member in struct:g82_channel_dma_v0
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cl826f.h | 9 __u8 chid; member in struct:g82_channel_gpfifo_v0
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cl906f.h | 9 __u8 chid; member in struct:fermi_channel_gpfifo_v0
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cla06f.h | 10 __u16 chid; member in struct:kepler_channel_gpfifo_a_v0
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clc36f.h | 10 __u16 chid; member in struct:volta_channel_gpfifo_a_v0
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
nouveau_nvkm_engine_disp_gp102.c | 36 gp102_disp_intr_error(struct nv50_disp *disp, int chid) 40 u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12)); 41 u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12)); 42 u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12)); 44 nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n", 45 chid, (mthd & 0x0000ffc), data, mthd, unkn); 47 if (chid < ARRAY_SIZE(disp->chan)) { 50 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); 57 nvkm_wr32(device, 0x61009c, (1 << chid)); 58 nvkm_wr32(device, 0x6111f0 + (chid * 12), 0x90000000) [all...] |
nouveau_nvkm_engine_disp_dmacgv100.c | 36 const u32 soff = (chan->chid.ctrl - 1) * 0x04; 50 chan->chid.user, -9, handle, 51 chan->chid.user << 25 | 0x00000040); 58 const u32 coff = chan->chid.ctrl * 0x04; 69 const u32 uoff = (chan->chid.ctrl - 1) * 0x1000; 70 const u32 poff = chan->chid.ctrl * 0x10; 71 const u32 coff = chan->chid.ctrl * 0x04;
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nouveau_nvkm_engine_disp_changv100.c | 38 return 0x690000 + ((chan->chid.user - 1) * 0x1000);
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nouveau_nvkm_engine_disp_piocgf119.c | 40 int ctrl = chan->chid.ctrl; 41 int user = chan->chid.user; 59 int ctrl = chan->chid.ctrl; 60 int user = chan->chid.user;
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nouveau_nvkm_engine_disp_dmacnv50.c | 41 struct nv50_disp *disp, int chid, int head, u64 push, 49 ret = nv50_disp_chan_new_(func, mthd, disp, chid, chid, head, oclass, 79 chan->chid.user, -10, handle, 80 chan->chid.user << 28 | 81 chan->chid.user); 89 int ctrl = chan->chid.ctrl; 90 int user = chan->chid.user; 109 int ctrl = chan->chid.ctrl; 110 int user = chan->chid.user [all...] |
nouveau_nvkm_engine_disp_dmacgf119.c | 39 chan->chid.user, -9, handle, 40 chan->chid.user << 27 | 0x00000001); 48 int ctrl = chan->chid.ctrl; 49 int user = chan->chid.user; 68 int ctrl = chan->chid.ctrl; 69 int user = chan->chid.user;
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nouveau_nvkm_engine_disp_gf119.c | 95 gf119_disp_intr_error(struct nv50_disp *disp, int chid) 99 u32 stat = nvkm_rd32(device, 0x6101f0 + (chid * 12)); 102 u32 data = nvkm_rd32(device, 0x6101f4 + (chid * 12)); 103 u32 code = nvkm_rd32(device, 0x6101f8 + (chid * 12)); 107 nvkm_error(subdev, "chid %d stat %08x reason %d [%s] mthd %04x " 109 chid, stat, type, reason ? reason->name : "", 112 if (chid < ARRAY_SIZE(disp->chan)) { 115 nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR); 122 nvkm_wr32(device, 0x61009c, (1 << chid)); 123 nvkm_wr32(device, 0x6101f0 + (chid * 12), 0x90000000) 137 int chid = __ffs(stat); stat &= ~(1 << chid); local in function:gf119_disp_intr 146 int chid = ffs(stat) - 1; local in function:gf119_disp_intr [all...] |
nouveau_nvkm_engine_disp_piocnv50.c | 40 int ctrl = chan->chid.ctrl; 41 int user = chan->chid.user; 59 int ctrl = chan->chid.ctrl; 60 int user = chan->chid.user;
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nouveau_nvkm_engine_disp_cursgv100.c | 35 const u32 soff = (chan->chid.ctrl - 1) * 0x04; 57 const u32 hoff = chan->chid.ctrl * 4; 68 nvkm_wr32(device, 0x6104e0 + chan->chid.ctrl * 4, 0x00000001);
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nouveau_nvkm_engine_disp_dmacgp102.c | 38 int ctrl = chan->chid.ctrl; 39 int user = chan->chid.user;
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/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
ramht.h | 11 int chid; member in struct:nvkm_ramht_data 28 int chid, int addr, u32 handle, u32 context); 31 nvkm_ramht_search(struct nvkm_ramht *, int chid, u32 handle);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/core/ |
nouveau_nvkm_core_ramht.c | 32 nvkm_ramht_hash(struct nvkm_ramht *ramht, int chid, u32 handle) 41 hash ^= chid << (ramht->bits - 4); 46 nvkm_ramht_search(struct nvkm_ramht *ramht, int chid, u32 handle) 50 co = ho = nvkm_ramht_hash(ramht, chid, handle); 52 if (ramht->data[co].chid == chid) { 66 int chid, int addr, u32 handle, u32 context) 73 data->chid = chid; 80 data->chid = -1 [all...] |
/src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/engine/ |
sw.h | 15 bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
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/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
priv.h | 13 void nvkm_fifo_kevent(struct nvkm_fifo *, int chid); 14 void nvkm_fifo_recover_chan(struct nvkm_fifo *, int chid); 32 void (*recover_chan)(struct nvkm_fifo *, int chid);
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nouveau_nvkm_engine_fifo_dmanv40.c | 73 int chid; local in function:nv40_fifo_dma_engine_fini 81 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1); 82 if (chid == chan->base.chid) 103 int chid; local in function:nv40_fifo_dma_engine_init 112 chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1); 113 if (chid == chan->base.chid) 153 u32 context = chan->base.chid << 23; 168 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4 [all...] |
nouveau_nvkm_engine_fifo_dmanv04.c | 57 u32 context = 0x80000000 | chan->base.chid << 24; 72 hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4, 89 u32 chid; local in function:nv04_fifo_dma_fini 96 chid = nvkm_rd32(device, NV03_PFIFO_CACHE1_PUSH1) & mask; 97 if (chid == chan->base.chid) { 126 nvkm_mask(device, NV04_PFIFO_MODE, 1 << chan->base.chid, 0); 137 u32 mask = 1 << chan->base.chid; 207 args->v0.chid = chan->base.chid; [all...] |
/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
nv20.h | 30 int chid; member in struct:nv20_gr_chan
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