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    Searched refs:chunk_hdl_adjust_cur1 (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_display_rq_dlg_helpers.c 312 "DML_RQ_DLG_CALC: chunk_hdl_adjust_cur1 = 0x%0x\n",
313 dlg_regs.chunk_hdl_adjust_cur1);
display_mode_structs.h 455 unsigned int chunk_hdl_adjust_cur1; member in struct:_vcs_dpi_display_dlg_regs_st
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hw_sequencer_debug.c 280 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,
amdgpu_dcn10_hw_sequencer.c 247 dlg_regs->chunk_hdl_adjust_cur1, dlg_regs->vready_after_vcount0, dlg_regs->dst_y_delta_drq_limit,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_rq_dlg_calc_20.c 1515 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3;
amdgpu_display_rq_dlg_calc_20v2.c 1516 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_rq_dlg_calc_21.c 1615 disp_dlg_regs->chunk_hdl_adjust_cur1 = 3;

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