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    Searched refs:ci_cpl (Results 1 - 25 of 72) sorted by relevancy

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  /src/sys/arch/arm/pic/
pic_splfuncs.c 56 const int oldipl = ci->ci_cpl;
58 if (newipl > ci->ci_cpl) {
68 const int oldipl = ci->ci_cpl;
69 KASSERT(panicstr || newipl <= ci->ci_cpl);
70 if (newipl < ci->ci_cpl) {
88 if (__predict_false(savedipl == ci->ci_cpl)) {
92 if (ci->ci_cpl >= IPL_VM) {
94 KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
95 "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
100 KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d"
    [all...]
  /src/sys/arch/arm/cortex/
gic_splfuncs.c 55 const int oldipl = ci->ci_cpl;
56 KASSERT(panicstr || newipl <= ci->ci_cpl);
57 if (newipl < ci->ci_cpl) {
77 if (newipl >= ci->ci_cpl) {
gic.c 234 ci->ci_cpl = ipl;
321 const int old_ipl = ci->ci_cpl;
331 * Raise ci_hwpl (and PMR) to ci_cpl and IAR will tell us if the
369 * GIC has asserted IPL for us so we can just update ci_cpl.
371 * But it's not that simple. We may have already bumped ci_cpl
378 * However, if are just raising ipl, we can just update ci_cpl.
381 /* Surely we can KASSERT(ipl < ci->ci_cpl); */
383 if (__predict_false(ipl < ci->ci_cpl)) {
385 KASSERT(ci->ci_cpl == ipl);
386 } else if (ci->ci_cpl != ipl)
    [all...]
  /src/sys/arch/evbmips/evbmips/
interrupt.c 60 KASSERT(ci->ci_cpl == IPL_HIGH);
70 KASSERTMSG(ci->ci_cpl == ipl,
71 "%s: cpl (%d) != ipl (%d)", __func__, ci->ci_cpl, ipl);
109 KASSERT(ci->ci_cpl == IPL_HIGH);
  /src/sys/arch/mips/mips/
mips_softint.c 103 KASSERTMSG(ci->ci_cpl == IPL_HIGH, "cpl (%d) != HIGH", ci->ci_cpl); \
115 KASSERT(ci->ci_cpl == IPL_HIGH);
  /src/sys/arch/epoc32/epoc32/
intr.c 47 const int oldipl = ci->ci_cpl;
  /src/sys/arch/or1k/include/
cpu.h 64 int ci_cpl; member in struct:cpu_info
111 && (ci->ci_data.cpu_softints >> ci->ci_cpl) > 0)
  /src/sys/arch/powerpc/powerpc/
intr_stubs.c 49 int cpl = curcpu()->ci_cpl;
50 curcpu()->ci_cpl = ipl;
57 curcpu()->ci_cpl = ipl;
softint_machdep.c 61 KASSERTMSG(ci->ci_cpl == IPL_HIGH,
62 "%s: cpl (%d) != HIGH", __func__, ci->ci_cpl);
75 KASSERT(ci->ci_cpl == IPL_HIGH);
  /src/sys/arch/evbarm/iq80310/
iq80310_intr.c 261 new = ci->ci_cpl;
268 ci->ci_cpl |= iq80310_imask[si_to_ipl[(si)]]; \
272 ci->ci_cpl = new; \
430 pcpl = ci->ci_cpl;
458 ci->ci_cpl |= iq->iq_mask;
466 ci->ci_cpl = pcpl;
481 if ((iq80310_ipending & ~IRQ_BITS) & ~ci->ci_cpl) {
  /src/sys/arch/hppa/hppa/
intr.c 108 ci->ci_cpl = -1;
290 KASSERT(ci->ci_cpl == -1);
373 while (ci->ci_ipending & ~ci->ci_cpl) {
376 hppa_intr_dispatch(ci->ci_cpl, frame->tf_eiem, frame);
392 "%s: ci->ipending %08x ci->ci_cpl %08x shared %08x\n",
393 __func__, ci->ci_ipending, ci->ci_cpl, shared);
453 ci->ci_cpl = ncpl | ci->ci_imask[ib->ib_ipl];
479 ci->ci_cpl = ncpl;
  /src/sys/arch/aarch64/aarch64/
fpu.c 223 KASSERTMSG(ci->ci_cpl <= IPL_VM || cold, "cpl=%d", ci->ci_cpl);
258 KASSERT(ci->ci_cpl == IPL_VM || cold);
  /src/sys/arch/arm/arm/
arm_machdep.c 118 .ci_cpl = IPL_HIGH,
296 cpl = l->l_cpu->ci_cpl;
344 return curcpu()->ci_cpl != IPL_NONE;
ast.c 120 KDASSERT(ci->ci_cpl == IPL_NONE);
  /src/sys/arch/powerpc/pic/
intr.c 524 const int pcpl = ci->ci_cpl;
548 ci->ci_cpl = pcpl; /* Don't use splx... we are here already! */
564 ci->ci_cpl = IPL_HIGH;
569 ci->ci_cpl = pcpl;
587 const int pcpl = ci->ci_cpl;
620 ci->ci_cpl = pcpl;
653 if (ncpl == ci->ci_cpl)
656 ocpl = ci->ci_cpl;
658 ci->ci_cpl = uimax(ncpl, ocpl);
683 ci->ci_cpl = ncpl
    [all...]
  /src/sys/arch/mips/rmi/
rmixl_fmnvar.h 195 KASSERT(curcpu()->ci_cpl == IPL_HIGH);
216 KASSERT(curcpu()->ci_cpl == IPL_HIGH);
  /src/sys/arch/arm/include/
cpu.h 220 int ci_cpl; /* current processor level (spl) */ member in struct:cpu_info
339 return curcpu()->ci_cpl;
345 curcpu()->ci_cpl = pri;
355 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0)
  /src/sys/arch/arm/ixp12x0/
ixp12x0_intr.c 321 curcpu()->ci_cpl = 0;
381 const int ppl = ci->ci_cpl;
406 ci->ci_cpl = ih->ih_ipl;
421 ci->ci_cpl = ih->ih_ipl;
429 ci->ci_cpl = ppl;
  /src/sys/arch/riscv/include/
cpu.h 69 int ci_cpl; member in struct:cpu_info
220 && (ci->ci_data.cpu_softints >> ci->ci_cpl) > 0)
  /src/sys/arch/aarch64/include/
cpu.h 146 int ci_cpl; /* current processor level (spl) */ member in struct:cpu_info
257 if (ci->ci_intr_depth == 0 && (ci->ci_softints >> ci->ci_cpl) > 0) {
  /src/sys/arch/arm/marvell/
mvsoc_intr.c 81 const int oldipl = ci->ci_cpl;
  /src/sys/arch/riscv/riscv/
softint_machdep.c 87 const int opl = ci->ci_cpl;
  /src/sys/arch/arm/footbridge/
footbridge_irqhandler.c 286 const int ppl = ci->ci_cpl;
320 ci->ci_cpl = ih->ih_ipl;
328 ci->ci_cpl = ppl;
  /src/sys/arch/arm/xscale/
becc_icu.c 341 const int ppl = ci->ci_cpl;
374 ci->ci_cpl = ih->ih_ipl;
380 ci->ci_cpl = ppl;
i80321_icu.c 360 const int ppl = ci->ci_cpl;
425 ci->ci_cpl = ih->ih_ipl;
441 ci->ci_cpl = ppl;

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