| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| smu_v12_0.h | 84 enum smu_clk_type clk_id,
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| smu_v11_0.h | 203 enum smu_clk_type clk_id,
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| amdgpu_smu.h | 526 int (*get_current_clk_freq)(struct smu_context *smu, enum smu_clk_type clk_id, uint32_t *value);
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| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_smu_v11_0.c | 574 input.clk_id = SMU11_SYSPLL0_SOCCLK_ID;
588 input.clk_id = SMU11_SYSPLL0_DCEFCLK_ID;
602 input.clk_id = SMU11_SYSPLL0_ECLK_ID;
616 input.clk_id = SMU11_SYSPLL0_VCLK_ID;
630 input.clk_id = SMU11_SYSPLL0_DCLK_ID;
646 input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;
943 int clk_id; local in function:smu_v11_0_get_max_sustainable_clock
952 clk_id = smu_clk_get_index(smu, clock_select);
953 if (clk_id < 0)
957 clk_id << 16)
1772 int ret = 0, clk_id = 0; local in function:smu_v11_0_get_dpm_ultimate_freq
1807 int ret = 0, clk_id = 0; local in function:smu_v11_0_set_soft_freq_limited_range
[all...] |
| amdgpu_smu_v12_0.c | 360 enum smu_clk_type clk_id,
366 if (clk_id >= SMU_CLK_COUNT || !value)
369 ret = smu_get_current_clk_freq_by_table(smu, clk_id, &freq);
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| amdgpu_renoir_ppt.c | 398 int ret = 0, clk_id = 0; local in function:renoir_get_current_clk_freq_by_table
405 clk_id = smu_clk_get_index(smu, clk_type);
406 if (clk_id < 0)
407 return clk_id;
409 *value = metrics.ClockFrequency[clk_id];
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| smu_internal.h | 115 #define smu_get_current_clk_freq(smu, clk_id, value) \
116 ((smu)->ppt_funcs->get_current_clk_freq? (smu)->ppt_funcs->get_current_clk_freq((smu), (clk_id), (value)) : 0)
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| amdgpu_smu.c | 245 int ret = 0, clk_id = 0; local in function:smu_set_hard_freq_range
254 clk_id = smu_clk_get_index(smu, clk_type);
255 if (clk_id < 0)
256 return clk_id;
259 param = (uint32_t)((clk_id << 16) | (max & 0xffff));
267 param = (uint32_t)((clk_id << 16) | (min & 0xffff));
330 int ret = 0, clk_id = 0; local in function:smu_get_dpm_freq_by_index
339 clk_id = smu_clk_get_index(smu, clk_type);
340 if (clk_id < 0)
341 return clk_id;
[all...] |
| amdgpu_arcturus_ppt.c | 374 PPCLK_e clk_id)
381 (clk_id << 16 | 0xFF));
397 (clk_id << 16 | i));
1072 int ret = 0, clk_id = 0; local in function:arcturus_get_current_clk_freq_by_table
1077 clk_id = smu_clk_get_index(smu, clk_type);
1078 if (clk_id < 0)
1085 switch (clk_id) {
1088 * CurrClock[clk_id] can provide accurate
1111 *value = metrics.CurrClock[clk_id];
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| amdgpu_navi10_ppt.c | 719 int ret = 0, clk_id = 0; local in function:navi10_get_current_clk_freq_by_table
726 clk_id = smu_clk_get_index(smu, clk_type);
727 if (clk_id < 0)
728 return clk_id;
730 *value = metrics.CurrClock[clk_id];
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| amdgpu_vega20_ppt.c | 673 PPCLK_e clk_id)
680 (clk_id << 16 | 0xFF));
697 (clk_id << 16 | i));
2538 PPCLK_e clk_id; local in function:vega20_set_od_percentage
2548 clk_id = PPCLK_GFXCLK;
2555 clk_id = PPCLK_UCLK;
2578 clk_id);
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| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/ |
| sanitizer_linux.h | 53 uptr internal_clock_gettime(__sanitizer_clockid_t clk_id, void *tp);
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| sanitizer_solaris.cc | 198 uptr internal_clock_gettime(__sanitizer_clockid_t clk_id, void *tp) {
200 return clock_gettime(clk_id, (timespec *)tp);
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| sanitizer_netbsd.cc | 244 uptr internal_clock_gettime(__sanitizer_clockid_t clk_id, void *tp) {
246 return _REAL(__clock_gettime50, clk_id, tp);
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| sanitizer_linux_libcdep.cc | 795 int real_clock_gettime(u32 clk_id, void *tp);
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| sanitizer_linux.cc | 511 uptr internal_clock_gettime(__sanitizer_clockid_t clk_id, void *tp) {
512 return internal_syscall(SYSCALL(clock_gettime), clk_id, tp);
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| sanitizer_common_interceptors.inc | 2149 INTERCEPTOR(int, clock_getres, u32 clk_id, void *tp) {
2151 COMMON_INTERCEPTOR_ENTER(ctx, clock_getres, clk_id, tp);
2155 int res = REAL(clock_getres)(clk_id, tp);
2161 INTERCEPTOR(int, clock_gettime, u32 clk_id, void *tp) {
2163 COMMON_INTERCEPTOR_ENTER(ctx, clock_gettime, clk_id, tp);
2167 int res = REAL(clock_gettime)(clk_id, tp);
2175 int real_clock_gettime(u32 clk_id, void *tp) {
2177 return internal_clock_gettime(clk_id, tp);
2178 return REAL(clock_gettime)(clk_id, tp);
2182 INTERCEPTOR(int, clock_settime, u32 clk_id, const void *tp)
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| ppatomfwctrl.h | 242 uint8_t clk_id, uint8_t syspll_id,
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| amdgpu_ppatomfwctrl.c | 497 uint8_t clk_id, uint8_t syspll_id,
505 parameters.clk_id = clk_id;
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| amdgpu_vega20_hwmgr.c | 530 PPCLK_e clk_id, uint32_t *num_of_levels)
536 (clk_id << 16 | 0xFF));
550 PPCLK_e clk_id, uint32_t index, uint32_t *clk)
556 (clk_id << 16 | index));
570 struct vega20_single_dpm_table *dpm_table, PPCLK_e clk_id)
575 ret = vega20_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels);
583 ret = vega20_get_dpm_frequency_by_index(hwmgr, clk_id, i, &clk);
2124 PPCLK_e clk_id, uint32_t *clk_freq)
2131 PPSMC_MSG_GetDpmClockFreq, (clk_id << 16))) == 0,
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| amdgpu_vega12_hwmgr.c | 487 PPCLK_e clk_id, uint32_t *num_of_levels)
493 (clk_id << 16 | 0xFF));
524 struct vega12_single_dpm_table *dpm_table, PPCLK_e clk_id)
529 ret = vega12_get_number_of_dpm_level(hwmgr, clk_id, &num_of_levels);
537 ret = vega12_get_dpm_frequency_by_index(hwmgr, clk_id, i, &clk);
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| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| atomfirmware.h | 2526 uint8_t clk_id; // atom_smu9_syspll0_clock_id (only valid when command == GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ ) member in struct:atom_get_smu_clock_info_parameters_v3_1
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