| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| juno-clocks.dtsi | 12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <7372800>;
15 clock-output-names = "juno:uartclk";
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <48000000>;
22 clock-output-names = "clk48mhz";
26 compatible = "fixed-clock";
27 #clock-cells = <0>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amd/ |
| amd-seattle-clks.dtsi | 9 compatible = "fixed-clock";
10 #clock-cells = <0>;
11 clock-frequency = <100000000>;
12 clock-output-names = "adl3clk_100mhz";
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <375000000>;
19 clock-output-names = "ccpclk_375mhz";
23 compatible = "fixed-clock";
24 #clock-cells = <0>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/stingray/ |
| stingray-clock.dtsi | 33 #include <dt-bindings/clock/bcm-sr.h>
36 #clock-cells = <0>;
37 compatible = "fixed-clock";
38 clock-frequency = <50000000>;
42 #clock-cells = <0>;
43 compatible = "fixed-factor-clock";
45 clock-div = <2>;
46 clock-mult = <1>;
50 #clock-cells = <1>;
55 clock-output-names = "genpll0", "clk_125m", "clk_scr"
[all...] |
| /src/sys/arch/hpcmips/hpcmips/ |
| clock.c | 1 /* $NetBSD: clock.c,v 1.22 2011/03/16 14:43:36 tsutsui Exp $ */
65 * from: Utah Hdr: clock.c 1.18 91/01/21
67 * @(#)clock.c 8.1 (Berkeley) 6/10/93
71 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.22 2011/03/16 14:43:36 tsutsui Exp $");
83 * Register CPU(VR41XX or TX39XX) dependent clock routine to system.
86 platform_clock_attach(device_t dev, struct platform_clock *clock)
91 clock->self = dev;
92 platform.clock = clock;
105 struct platform_clock *clock = platform.clock local in function:cpu_initclocks
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| bcm-cygnus-clock.dtsi | 39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <25000000>;
46 #clock-cells = <0>;
52 /* peripheral clock for system timer */
54 #clock-cells = <0>;
55 compatible = "fixed-factor-clock";
57 clock-div = <2>;
58 clock-mult = <1>;
61 /* APB bus clock */
[all...] |
| am43xx-clocks.dtsi | 3 * Device Tree Source for AM43xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
17 #clock-cells = <0>;
18 compatible = "ti,mux-clock";
25 #clock-cells = <0>;
26 compatible = "ti,mux-clock";
33 #clock-cells = <0>;
34 compatible = "fixed-factor-clock";
36 clock-mult = <1>
[all...] |
| omap24xx-clocks.dtsi | 3 * Device Tree Source for OMAP24xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,composite-mux-clock";
17 #clock-cells = <0>;
18 compatible = "ti,composite-clock";
23 #clock-cells = <0>;
24 compatible = "ti,composite-mux-clock";
31 #clock-cells = <0>;
32 compatible = "ti,composite-clock";
39 #clock-cells = <0>
[all...] |
| omap36xx-omap3430es2plus-clocks.dtsi | 3 * Device Tree Source for OMAP34xx/OMAP36xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,composite-no-wait-gate-clock";
17 #clock-cells = <0>;
18 compatible = "ti,composite-divider-clock";
26 #clock-cells = <0>;
27 compatible = "ti,composite-clock";
32 #clock-cells = <0>;
33 compatible = "fixed-factor-clock";
35 clock-mult = <1>
[all...] |
| dm814x-clocks.dtsi | 10 #clock-cells = <1>;
11 compatible = "ti,dm814-adpll-s-clock";
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
22 #clock-cells = <1>;
23 compatible = "ti,dm814-adpll-lj-clock";
26 clock-names = "clkinp", "clkinpulow";
27 clock-output-names = "481c5080.adpll.dcoclkldo",
33 #clock-cells = <1>;
34 compatible = "ti,dm814-adpll-lj-clock";
[all...] |
| omap54xx-clocks.dtsi | 3 * Device Tree Source for OMAP5 clock data
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <12000000>;
15 #clock-cells = <0>;
16 compatible = "ti,gate-clock";
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <32768>;
29 #clock-cells = <0>
[all...] |
| keystone-clocks.dtsi | 3 * Device Tree Source for Keystone 2 clock tree
14 #clock-cells = <0>;
15 compatible = "ti,keystone,pll-mux-clock";
20 clock-output-names = "mainmuxclk";
24 #clock-cells = <0>;
25 compatible = "fixed-factor-clock";
27 clock-div = <1>;
28 clock-mult = <1>;
29 clock-output-names = "chipclk1";
33 #clock-cells = <0>
[all...] |
| dra7xx-clocks.dtsi | 3 * Device Tree Source for DRA7xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
15 #clock-cells = <0>;
16 compatible = "ti,dra7-atl-clock";
21 #clock-cells = <0>;
22 compatible = "ti,dra7-atl-clock";
27 #clock-cells = <0>;
28 compatible = "ti,dra7-atl-clock";
33 #clock-cells = <0>
[all...] |
| omap3xxx-clocks.dtsi | 3 * Device Tree Source for OMAP3 clock data
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <16800000>;
15 #clock-cells = <0>;
16 compatible = "ti,mux-clock";
22 #clock-cells = <0>;
23 compatible = "ti,divider-clock";
32 #clock-cells = <0>;
33 compatible = "ti,gate-clock";
[all...] |
| am33xx-clocks.dtsi | 3 * Device Tree Source for AM33xx clock data
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
17 #clock-cells = <0>;
18 compatible = "fixed-factor-clock";
20 clock-mult = <1>;
21 clock-div = <1>;
25 #clock-cells = <0>;
26 compatible = "fixed-factor-clock";
28 clock-mult = <1>
[all...] |
| keystone-k2e-clocks.dtsi | 10 #clock-cells = <0>;
11 compatible = "ti,keystone,main-pll-clock";
18 #clock-cells = <0>;
19 compatible = "ti,keystone,pll-clock";
21 clock-output-names = "papllclk";
27 #clock-cells = <0>;
28 compatible = "ti,keystone,pll-clock";
30 clock-output-names = "ddr-3a-pll-clk";
36 #clock-cells = <0>;
37 compatible = "ti,keystone,psc-clock";
[all...] |
| dm816x-clocks.dtsi | 5 #clock-cells = <1>;
6 compatible = "ti,dm816-fapll-clock";
9 clock-indices = <1>, <2>, <3>, <4>, <5>,
11 clock-output-names = "main_pll_clk1",
21 #clock-cells = <1>;
22 compatible = "ti,dm816-fapll-clock";
25 clock-indices = <1>, <2>, <3>, <4>;
26 clock-output-names = "ddr_pll_clk1",
33 #clock-cells = <1>;
34 compatible = "ti,dm816-fapll-clock";
[all...] |
| am35xx-clocks.dtsi | 3 * Device Tree Source for OMAP3 clock data
9 #clock-cells = <0>;
10 compatible = "ti,am35xx-gate-clock";
17 #clock-cells = <0>;
18 compatible = "ti,gate-clock";
25 #clock-cells = <0>;
26 compatible = "ti,am35xx-gate-clock";
33 #clock-cells = <0>;
34 compatible = "ti,gate-clock";
41 #clock-cells = <0>
[all...] |
| omap3430es1-clocks.dtsi | 3 * Device Tree Source for OMAP3430 ES1 clock data
9 #clock-cells = <0>;
10 compatible = "ti,wait-gate-clock";
17 #clock-cells = <0>;
18 compatible = "ti,divider-clock";
26 #clock-cells = <0>;
27 compatible = "fixed-factor-clock";
29 clock-mult = <1>;
30 clock-div = <1>;
34 #clock-cells = <0>
[all...] |
| mps2.dtsi | 52 compatible = "fixed-clock";
53 #clock-cells = <0>;
54 clock-frequency = <50000000>;
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <24576000>;
64 compatible = "fixed-clock";
65 #clock-cells = <0>;
66 clock-frequency = <25000000>;
70 compatible = "fixed-clock";
[all...] |
| exynos5410.dtsi | 14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
37 clock-frequency = <1600000000>;
44 clock-frequency = <1600000000>;
51 clock-frequency = <1600000000>;
58 clock-frequency = <1600000000>;
71 clock-names = "clkout16";
73 #clock-cells = <1>;
76 clock: clock-controller@10010000 label in label:soc
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/microchip/ |
| mpfs-sev-kit-fabric.dtsi | 6 compatible = "fixed-clock";
7 #clock-cells = <0>;
8 clock-frequency = <0>;
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <125000000>;
|
| mpfs-tysom-m-fabric.dtsi | 8 compatible = "fixed-clock";
9 #clock-cells = <0>;
10 clock-frequency = <62500000>;
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <125000000>;
|
| /src/sys/arch/mvme68k/stand/libsa/ |
| Makefile.inc | 13 chiptotime.c clock.c \
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/broadcom/northstar2/ |
| ns2-clock.dtsi | 33 #include <dt-bindings/clock/bcm-ns2.h>
36 #clock-cells = <0>;
37 compatible = "fixed-clock";
38 clock-frequency = <25000000>;
42 #clock-cells = <1>;
48 clock-output-names = "lcpll_ddr", "pcie_sata_usb",
55 #clock-cells = <1>;
61 clock-output-names = "lcpll_ports", "wan", "rgmii",
69 #clock-cells = <1>;
75 clock-output-names = "genpll_scr", "scr", "fs"
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/mips/boot/dts/realtek/ |
| rtl838x.dtsi | 12 clock-names = "cpu";
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <500000000>;
|
