/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/ |
dcn20_clk_mgr.h | 52 enum dc_clock_type clock_type,
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amdgpu_dcn20_clk_mgr.c | 383 enum dc_clock_type clock_type, 387 if (clock_type == DC_CLOCK_TYPE_DISPCLK) { 393 if (clock_type == DC_CLOCK_TYPE_DPPCLK) {
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
amdgpu_dce112_clk_mgr.c | 93 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; 108 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK; 147 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; 184 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK;
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/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
amdgpu_atombios.h | 160 u8 clock_type, 213 u8 clock_type,
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amdgpu_atombios.c | 1004 u8 clock_type, 1025 if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { 1026 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); 1044 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); 1074 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
hw_sequencer.h | 168 enum dc_clock_type clock_type, 170 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
clk_mgr.h | 181 enum dc_clock_type clock_type,
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clk_mgr_internal.h | 177 enum clock_type { enum
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/src/sys/external/bsd/drm2/dist/drm/amd/include/ |
dm_pp_interface.h | 192 enum amd_pp_clock_type clock_type; member in struct:pp_display_clock_request
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
dcn10_hw_sequencer.h | 168 enum dc_clock_type clock_type, 172 enum dc_clock_type clock_type,
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amdgpu_dcn10_hw_sequencer.c | 3268 enum dc_clock_type clock_type, 3278 context, clock_type, &clock_cfg); 3293 if (clock_type == DC_CLOCK_TYPE_DISPCLK) 3295 else if (clock_type == DC_CLOCK_TYPE_DPPCLK) 3308 enum dc_clock_type clock_type, 3314 dc->clk_mgr->funcs->get_clock(dc->clk_mgr, context, clock_type, clock_cfg);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
amdgpu_dm_pp_smu.c | 505 pp_clock_request.clock_type = dc_to_pp_clock_type(clock_for_voltage_req->clk_type); 508 if (!pp_clock_request.clock_type) 779 clock_req.clock_type = amd_pp_dcef_clock; 801 clock_req.clock_type = amd_pp_mem_clock; 839 clock_req.clock_type = amd_pp_disp_clock; 842 clock_req.clock_type = amd_pp_phy_clock; 845 clock_req.clock_type = amd_pp_pixel_clock;
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/src/sys/external/bsd/drm2/dist/drm/amd/display/include/ |
bios_parser_types.h | 264 enum bp_dce_clock_type clock_type; member in struct:bp_set_dce_clock_parameters
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
amdgpu_command_table2.c | 809 !cmd->dc_clock_type_to_atom(bp_params->clock_type, 816 if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) { 840 "clock_type = %d \n", __func__,\ 842 bp_params->clock_type);
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amdgpu_command_table.c | 2325 !cmd->dc_clock_type_to_atom(bp_params->clock_type, &atom_clock_type)) 2331 if (bp_params->clock_type == DCECLOCK_TYPE_DPREFCLK) {
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/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
ppatomfwctrl.h | 221 uint32_t clock_type, uint32_t clock_value,
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amdgpu_ppatomfwctrl.c | 247 * @param clock_type input parameter: Clock type: 1 - GFXCLK, 2 - UCLK, 0 - All other clocks 252 uint32_t clock_type, uint32_t clock_value, 261 pll_parameters.gpu_clock_type = clock_type;
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amdgpu_smu10_hwmgr.c | 67 enum amd_pp_clock_type clk_type = clock_req->clock_type; 206 clock_req.clock_type = amd_pp_dcf_clock;
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amdgpu_vega12_hwmgr.c | 1440 enum amd_pp_clock_type clk_type = clock_req->clock_type; 1496 clock_req.clock_type = amd_pp_dcef_clock;
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amdgpu_vega20_hwmgr.c | 2256 enum amd_pp_clock_type clk_type = clock_req->clock_type; 2315 clock_req.clock_type = amd_pp_dcef_clock; 3906 "CLOCK_TYPE(NAME)",
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
dc.h | 1082 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping); 1083 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
dce_clk_mgr.c | 311 dce_clk_params.clock_type = DCECLOCK_TYPE_DISPLAY_CLOCK; 324 dce_clk_params.clock_type = DCECLOCK_TYPE_DPREFCLK;
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
amdgpu_dc.c | 2703 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_t stepping) 2706 return dc->hwss.set_clock(dc, clock_type, clk_khz, stepping); 2709 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) 2712 dc->hwss.get_clock(dc, clock_type, clock_cfg);
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/src/sys/external/bsd/drm2/dist/drm/radeon/ |
radeon_atombios.c | 2833 u8 clock_type, 2851 args.v1.ucAction = clock_type; 2865 args.v2.ucAction = clock_type; 2880 if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { 2881 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); 2899 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); 2930 args.v6_in.ulClock.ulComputeClockFlag = clock_type;
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/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
amdgpu_smu_v11_0.c | 1319 enum amd_pp_clock_type clk_type = clock_req->clock_type;
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