| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| H A D | s3c2416.dtsi | 31 clocks: clock-controller@4c000000 { label 43 clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, 44 <&clocks SCLK_UART>; 54 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, 55 <&clocks MUX_HSMMC0>; 65 clocks [all...] |
| H A D | s5pv210.dtsi | 82 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 94 clocks: clock-controller@e0100000 { label 98 clocks = <&xxti>, <&xusbxti>; 125 clocks = <&clocks CLK_PDMA0>; 137 clocks = <&clocks CLK_PDMA1>; 149 clocks [all...] |
| H A D | omap24xx-clocks.dtsi | 11 clocks = <&func_96m_ck>, <&mcbsp_clks>; 19 clocks = <&mcbsp1_gate_fck>, <&mcbsp1_mux_fck>; 25 clocks = <&func_96m_ck>, <&mcbsp_clks>; 33 clocks = <&mcbsp2_gate_fck>, <&mcbsp2_mux_fck>; 77 clocks = <&virt_19200000_ck>, <&virt_26m_ck>, <&virt_13m_ck>, <&virt_12m_ck>; 85 clocks = <&aplls_clkin_ck>; 93 clocks = <&aplls_clkin_ck>, <&aplls_clkin_x2_ck>; 102 clocks = <&osc_ck>; 124 clocks = <&sys_ck>, <&sys_ck>; 131 clocks [all...] |
| H A D | omap3430es1-clocks.dtsi | 11 clocks = <&l3_ick>; 19 clocks = <&l3_ick>; 28 clocks = <&gfx_l3_ck>; 36 clocks = <&gfx_l3_fck>; 44 clocks = <&gfx_l3_fck>; 52 clocks = <&sys_ck>; 60 clocks = <&core_48m_fck>; 68 clocks = <&corex2_fck>; 76 clocks = <&corex2_fck>; 85 clocks [all...] |
| H A D | s3c64xx.dtsi | 68 clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, 69 <&clocks SCLK_MMC0>; 79 clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, 80 <&clocks SCLK_MMC1>; 90 clocks = <&clocks HCLK_HSMMC [all...] |
| H A D | omap36xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>; 19 clocks = <&corex2_fck>; 28 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>; 34 clocks = <&ssi_ssr_fck>; 42 clocks = <&core_l3_ick>; 50 clocks = <&l4_ick>; 58 clocks = <&ssi_l4_ick>; 66 clocks = <&omap_96m_fck>; 74 clocks = <&sys_ck>; 82 clocks [all...] |
| H A D | omap2420-clocks.dtsi | 12 clocks = <&core_ck>; 20 clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>; 28 clocks = <&sys_clkout2_src_gate>, <&sys_clkout2_src_mux>; 34 clocks = <&sys_clkout2_src>; 44 clocks = <&dsp_fck>; 52 clocks = <&dsp_fck>; 62 clocks = <&dsp_gate_ick>, <&dsp_div_ick>; 68 clocks = <&core_ck>; 76 clocks = <&core_ck>; 85 clocks [all...] |
| H A D | omap34xx-omap36xx-clocks.dtsi | 11 clocks = <&l4_ick>; 19 clocks = <&security_l4_ick2>; 27 clocks = <&security_l4_ick2>; 35 clocks = <&security_l4_ick2>; 43 clocks = <&security_l4_ick2>; 51 clocks = <&dpll4_m5x2_ck>; 60 clocks = <&l4_ick>; 68 clocks = <&core_96m_fck>; 76 clocks = <&l3_ick>; 84 clocks [all...] |
| H A D | omap3xxx-clocks.dtsi | 17 clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck>, <&virt_16_8m_ck>; 24 clocks = <&osc_sys_ck>; 34 clocks = <&osc_sys_ck>; 42 clocks = <&dpll3_ck>; 50 clocks = <&dpll3_m2_ck>; 58 clocks = <&dpll4_ck>; 66 clocks = <&dpll3_m2x2_ck>; 74 clocks = <&sys_ck>; 84 clocks = <&core_96m_fck>, <&mcbsp_clks>; 92 clocks [all...] |
| H A D | am43xx-clocks.dtsi | 11 clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>; 19 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 27 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>; 35 clocks = <&sys_clkin_ck>; 43 clocks = <&sys_clkin_ck>; 51 clocks = <&sys_clkin_ck>; 59 clocks = <&sys_clkin_ck>; 67 clocks = <&sys_clkin_ck>; 75 clocks = <&sys_clkin_ck>; 83 clocks [all...] |
| H A D | am35xx-clocks.dtsi | 11 clocks = <&ipss_ick>; 19 clocks = <&rmii_ck>; 27 clocks = <&ipss_ick>; 35 clocks = <&pclk_ck>; 43 clocks = <&ipss_ick>; 51 clocks = <&sys_ck>; 59 clocks = <&sys_ck>; 68 clocks = <&core_l3_ick>; 88 clocks = <&core_l4_ick>; 96 clocks [all...] |
| H A D | wm8750.dtsi | 75 clocks { 94 clocks = <&ref25>; 101 clocks = <&ref25>; 108 clocks = <&ref25>; 115 clocks = <&ref25>; 122 clocks = <&ref25>; 129 clocks = <&plla>; 136 clocks = <&pllb>; 143 clocks = <&pllb>; 150 clocks [all...] |
| H A D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 11 clocks = <&corex2_fck>; 19 clocks = <&corex2_fck>; 28 clocks = <&sys_ck>, <&sys_ck>; 37 clocks = <&dpll5_ck>; 46 clocks = <&core_ck>; 54 clocks = <&core_ck>; 62 clocks = <&core_ck>; 70 clocks = <&core_ck>; 78 clocks = <&dpll4_m2x2_ck>; 86 clocks [all...] |
| H A D | keystone-k2e-clocks.dtsi | 8 clocks { 12 clocks = <&refclksys>; 20 clocks = <&refclkpass>; 29 clocks = <&refclkddr3a>; 38 clocks = <&chipclk16>; 48 clocks = <&chipclk12>; 58 clocks = <&chipclk12>; 68 clocks = <&chipclk13>; 76 * Below are set of fixed, input clocks definitions, 78 * Those clocks ca [all...] |
| H A D | omap54xx-clocks.dtsi | 17 clocks = <&pad_clks_src_ck>; 37 clocks = <&slimbus_src_clk>; 105 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>; 112 clocks = <&dpll_abe_ck>; 118 clocks = <&dpll_abe_x2_ck>; 127 clocks = <&dpll_abe_m2x2_ck>; 135 clocks = <&dpll_abe_m2x2_ck>; 144 clocks = <&aess_fclk>; 153 clocks = <&dpll_abe_m2x2_ck>; 161 clocks [all...] |
| H A D | dra7xx-clocks.dtsi | 11 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 17 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 23 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 29 clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>; 107 clocks = <&sys_clkin1>; 199 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>; 206 clocks = <&dpll_abe_ck>; 212 clocks = <&dpll_abe_x2_ck>; 223 clocks = <&dpll_abe_m2x2_ck>; 232 clocks [all...] |
| H A D | omap2430-clocks.dtsi | 12 clocks = <&func_96m_ck>, <&mcbsp_clks>; 19 clocks = <&mcbsp3_gate_fck>, <&mcbsp3_mux_fck>; 25 clocks = <&func_96m_ck>, <&mcbsp_clks>; 33 clocks = <&mcbsp4_gate_fck>, <&mcbsp4_mux_fck>; 39 clocks = <&func_96m_ck>, <&mcbsp_clks>; 47 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>; 55 clocks = <&dsp_fck>; 63 clocks = <&dsp_fck>; 73 clocks = <&iva2_1_gate_ick>, <&iva2_1_div_ick>; 79 clocks [all...] |
| H A D | dm816x-clocks.dtsi | 8 clocks = <&sys_clkin_ck &sys_clkin_ck>; 24 clocks = <&sys_clkin_ck &sys_clkin_ck>; 36 clocks = <&sys_clkin_ck &sys_clkin_ck>; 47 clocks = <&main_fapll 7>, < &sys_clkin_ck>; 88 clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1 96 clocks = <&clkout_pre_ck>; 105 clocks = <&clkout_div_ck>; 110 /* CM_DPLL clocks p1795 */ 114 clocks = <&main_fapll 1>; 122 clocks [all...] |
| H A D | stih407-clock.dtsi | 22 clocks { 38 clocks = <&clk_sysin>; 43 * ARM CPU related clocks. 50 clocks = <&clockgen_a9_pll 0>, 63 clocks = <&clk_m_a9>; 77 clocks = <&clk_sysin>; 85 clocks = <&clk_s_a0_pll 0>, 95 clocks = <&clk_sysin>; 106 clocks = <&clk_sysin>; 113 clocks [all...] |
| H A D | stih410-clock.dtsi | 23 clocks { 41 clocks = <&clk_sysin>; 46 * ARM CPU related clocks. 53 clocks = <&clockgen_a9_pll 0>, 63 clocks = <&clk_m_a9>; 77 clocks = <&clk_sysin>; 85 clocks = <&clk_s_a0_pll 0>, 95 clocks = <&clk_sysin>; 106 clocks = <&clk_sysin>; 113 clocks [all...] |
| H A D | stih418-clock.dtsi | 23 clocks { 41 clocks = <&clk_sysin>; 46 * ARM CPU related clocks. 53 clocks = <&clockgen_a9_pll 0>, 64 clocks = <&clk_m_a9>; 78 clocks = <&clk_sysin>; 86 clocks = <&clk_s_a0_pll 0>, 96 clocks = <&clk_sysin>; 107 clocks = <&clk_sysin>; 114 clocks [all...] |
| H A D | exynos5410.dtsi | 72 clocks = <&fin_pll>; 86 clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>; 94 clocks = <&clock CLK_TMU>; 103 clocks = <&clock CLK_TMU>; 112 clocks = <&clock CLK_TMU>; 121 clocks = <&clock CLK_TMU>; 132 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>; 144 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>; 156 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>; 196 clocks [all...] |
| H A D | ecx-common.dtsi | 42 clocks = <&eclk>; 50 clocks = <&pclk>; 60 clocks = <&pclk>; 71 clocks = <&pclk>; 82 clocks = <&pclk>; 93 clocks = <&pclk>; 102 clocks = <&pclk>; 110 clocks = <&pclk>; 118 clocks = <&pclk>, <&pclk>; 135 clocks { [all...] |
| /src/usr.bin/telnet/ |
| H A D | types.h | 43 extern Clocks clocks;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp-clk-ccf.dtsi | 44 clocks = <&zynqmp_clk CAN0_REF>, <&zynqmp_clk LPD_LSBUS>; 48 clocks = <&zynqmp_clk CAN1_REF>, <&zynqmp_clk LPD_LSBUS>; 52 clocks = <&zynqmp_clk ACPU>; 56 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 60 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 64 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 68 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 72 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 76 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; 80 clocks [all...] |