| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/ |
| bios_parser_types_internal.h | 65 struct cmd_tbl cmd_tbl; member in struct:bios_parser
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| bios_parser_types_internal2.h | 67 struct cmd_tbl cmd_tbl; member in struct:bios_parser
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| amdgpu_command_table.c | 130 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v3;
133 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v4;
137 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v5;
158 struct cmd_tbl *cmd_tbl = &bp->cmd_tbl; local in function:init_encoder_control_dig_v1
161 cmd_tbl->encoder_control_dig1 = encoder_control_dig1_v1;
163 cmd_tbl->encoder_control_dig1 = NULL;
166 cmd_tbl->encoder_control_dig2 = encoder_control_dig2_v1;
168 cmd_tbl->encoder_control_dig2 = NULL
178 struct cmd_tbl *cmd_tbl = &bp->cmd_tbl; local in function:encoder_control_dig_v1
[all...] |
| amdgpu_command_table2.c | 108 bp->cmd_tbl.dig_encoder_control = encoder_control_digx_v1_5;
112 bp->cmd_tbl.dig_encoder_control = encoder_control_fallback;
233 bp->cmd_tbl.transmitter_control = transmitter_control_v1_6;
237 bp->cmd_tbl.transmitter_control = transmitter_control_fallback;
333 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_v7;
338 bp->cmd_tbl.set_pixel_clock = set_pixel_clock_fallback;
475 bp->cmd_tbl.set_crtc_timing =
480 bp->cmd_tbl.set_crtc_timing = NULL;
596 bp->cmd_tbl.enable_crtc = enable_crtc_v1;
601 bp->cmd_tbl.enable_crtc = NULL
[all...] |
| command_table.h | 34 struct cmd_tbl { struct
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| command_table2.h | 34 struct cmd_tbl { struct
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| amdgpu_bios_parser2.c | 1035 if (!bp->cmd_tbl.transmitter_control)
1038 return bp->cmd_tbl.transmitter_control(bp, cntl);
1047 if (!bp->cmd_tbl.dig_encoder_control)
1050 return bp->cmd_tbl.dig_encoder_control(bp, cntl);
1059 if (!bp->cmd_tbl.set_pixel_clock)
1062 return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
1071 if (!bp->cmd_tbl.set_dce_clock)
1074 return bp->cmd_tbl.set_dce_clock(bp, bp_params);
1083 if (!bp->cmd_tbl.set_crtc_timing)
1086 return bp->cmd_tbl.set_crtc_timing(bp, bp_params)
[all...] |
| amdgpu_bios_parser.c | 737 if (!bp->cmd_tbl.transmitter_control)
740 return bp->cmd_tbl.transmitter_control(bp, cntl);
749 if (!bp->cmd_tbl.dig_encoder_control)
752 return bp->cmd_tbl.dig_encoder_control(bp, cntl);
761 if (!bp->cmd_tbl.adjust_display_pll)
764 return bp->cmd_tbl.adjust_display_pll(bp, bp_params);
773 if (!bp->cmd_tbl.set_pixel_clock)
776 return bp->cmd_tbl.set_pixel_clock(bp, bp_params);
785 if (!bp->cmd_tbl.set_dce_clock)
788 return bp->cmd_tbl.set_dce_clock(bp, bp_params)
[all...] |
| /src/sys/dev/ic/ |
| ahcisata_core.c | 845 struct ahci_cmd_tbl *cmd_tbl; local in function:ahci_do_reset_drive
890 cmd_tbl = achp->ahcic_cmd_tbl[c_slot];
895 memset(cmd_tbl->cmdt_cfis, 0, 64);
896 cmd_tbl->cmdt_cfis[fis_type] = RHD_FISTYPE;
897 cmd_tbl->cmdt_cfis[rhd_c] = drive;
898 cmd_tbl->cmdt_cfis[rhd_control] = WDCTL_RST | WDCTL_4BIT;
935 memset(cmd_tbl->cmdt_cfis, 0, 64);
936 cmd_tbl->cmdt_cfis[fis_type] = RHD_FISTYPE;
937 cmd_tbl->cmdt_cfis[rhd_c] = drive;
938 cmd_tbl->cmdt_cfis[rhd_control] = WDCTL_4BIT
1176 struct ahci_cmd_tbl *cmd_tbl; local in function:ahci_cmd_start
1428 struct ahci_cmd_tbl *cmd_tbl; local in function:ahci_bio_start
1762 struct ahci_cmd_tbl *cmd_tbl; local in function:ahci_dma_setup
1923 struct ahci_cmd_tbl *cmd_tbl; local in function:ahci_atapi_start
[all...] |
| /src/sys/ddb/ |
| db_command.c | 496 * *cmd_tbl pointer to static allocated db_command table
501 db_register_tbl(uint8_t type, const struct db_command *cmd_tbl)
506 if (cmd_tbl->name == 0)
516 list_ent->db_cmd=cmd_tbl;
547 * Remove command table specified with db_cmd address == cmd_tbl
550 db_unregister_tbl(uint8_t type,const struct db_command *cmd_tbl)
571 if (list_ent->db_cmd == cmd_tbl){
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