| /src/external/gpl3/gcc.old/dist/libgcc/config/spu/ |
| divmodti4.c | 58 qword cmp0 = si_cgti (c, 31); local
59 qword cmp1 = si_and (cmp0, si_shlqbyi (cmp0, 4));
60 qword cmp2 = si_and (cmp1, si_shlqbyi (cmp0, 8));
61 qword s = si_a (c, si_and (cmp0, si_shlqbyi (c, 4)));
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/rl78/ |
| divmodqi.S | 98 cmp0 den
162 cmp0 bit
232 cmp0 a
246 cmp0 a
287 cmp0 a
298 cmp0 a
|
| divmodhi.S | 547 cmp0 bitB0
617 cmp0 a
631 cmp0 a
671 cmp0 a
681 cmp0 a
|
| mulsi3.S | 296 cmp0 r10
304 cmp0 r12
|
| lshrsi3.S | 54 cmp0 a
|
| divmodsi.S | 844 cmp0 bitB0
853 cmp0 bitB0
906 cmp0 bitB0
998 cmp0 a
1012 cmp0 a
1054 cmp0 a
1065 cmp0 a
|
| fpbit-sf.S | 369 cmp0 a
587 cmp0 c
|
| fpmath-sf.S | 85 cmp0 c ; if the exp is all zeros, it's denormal
716 cmp0 a
998 cmp0 a
|
| /src/external/gpl3/gcc/dist/libgcc/config/rl78/ |
| divmodqi.S | 98 cmp0 den
162 cmp0 bit
232 cmp0 a
246 cmp0 a
287 cmp0 a
298 cmp0 a
|
| divmodhi.S | 547 cmp0 bitB0
617 cmp0 a
631 cmp0 a
671 cmp0 a
681 cmp0 a
|
| mulsi3.S | 296 cmp0 r10
304 cmp0 r12
|
| lshrsi3.S | 54 cmp0 a
|
| divmodsi.S | 844 cmp0 bitB0
853 cmp0 bitB0
906 cmp0 bitB0
998 cmp0 a
1012 cmp0 a
1054 cmp0 a
1065 cmp0 a
|
| fpbit-sf.S | 369 cmp0 a
587 cmp0 c
|
| fpmath-sf.S | 85 cmp0 c ; if the exp is all zeros, it's denormal
716 cmp0 a
998 cmp0 a
|
| /src/external/gpl3/gcc.old/dist/gcc/config/lm32/ |
| lm32.cc | 165 CMP0 CMP1 are the two comparison operands
172 rtx cmp0,
179 mode = GET_MODE (cmp0);
198 temp = cmp0;
199 cmp0 = cmp1;
212 if (!register_operand (cmp0, mode))
213 cmp0 = force_reg (mode, cmp0);
218 cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1);
226 /* We can't have const_ints in cmp0, other than 0. *
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/lm32/ |
| lm32.cc | 165 CMP0 CMP1 are the two comparison operands
172 rtx cmp0,
179 mode = GET_MODE (cmp0);
198 temp = cmp0;
199 cmp0 = cmp1;
212 if (!register_operand (cmp0, mode))
213 cmp0 = force_reg (mode, cmp0);
218 cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1);
226 /* We can't have const_ints in cmp0, other than 0. *
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/iq2000/ |
| iq2000.cc | 902 /* Generate the code to do a TEST_CODE comparison on two integer values CMP0
909 gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
953 mode = GET_MODE (cmp0);
961 if (GET_CODE (cmp0) == REG || GET_CODE (cmp0) == SUBREG)
977 if (GET_CODE (cmp0) == CONST_INT)
978 cmp0 = force_reg (mode, cmp0);
1029 rtx temp = cmp0;
1030 cmp0 = cmp1
1066 rtx cmp0 = operands[1]; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/iq2000/ |
| iq2000.cc | 901 /* Generate the code to do a TEST_CODE comparison on two integer values CMP0
908 gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
952 mode = GET_MODE (cmp0);
960 if (GET_CODE (cmp0) == REG || GET_CODE (cmp0) == SUBREG)
976 if (GET_CODE (cmp0) == CONST_INT)
977 cmp0 = force_reg (mode, cmp0);
1028 rtx temp = cmp0;
1029 cmp0 = cmp1
1065 rtx cmp0 = operands[1]; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/xtensa/ |
| xtensa.cc | 692 rtx cmp0, /* first operand to compare */
732 mode = GET_MODE (cmp0);
776 rtx temp = cmp0;
777 cmp0 = cmp1;
781 return gen_rtx_fmt_ee (p_info->test_code, VOIDmode, cmp0, cmp1);
790 rtx cmp0, /* first operand to compare */
816 fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
822 rtx temp = cmp0;
823 cmp0 = cmp1;
828 emit_insn (gen_fn (brtmp, cmp0, cmp1))
836 rtx cmp0 = operands[1]; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/xtensa/ |
| xtensa.cc | 709 rtx cmp0, /* first operand to compare */
749 mode = GET_MODE (cmp0);
793 rtx temp = cmp0;
794 cmp0 = cmp1;
800 VOIDmode, cmp0, cmp1);
809 rtx cmp0, /* first operand to compare */
835 fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
841 rtx temp = cmp0;
842 cmp0 = cmp1;
847 emit_insn (gen_fn (brtmp, cmp0, cmp1))
855 rtx cmp0 = operands[1]; local
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/loongarch/ |
| loongarch.cc | 3615 /* Compare CMP0 and CMP1 using ordering test CODE and store the result
3616 in TARGET. CMP0 and TARGET are register_operands. If INVERT_PTR
3622 rtx target, rtx cmp0, rtx cmp1)
3629 mode = GET_MODE (cmp0);
3631 loongarch_emit_binary (code, target, cmp0, cmp1);
3638 loongarch_emit_int_order_test (code, invert_ptr, target, cmp0, cmp1);
3645 inv_code, cmp0, cmp1);
3651 loongarch_emit_binary (inv_code, target, cmp0, cmp1);
3656 /* Return a register that is zero if CMP0 and CMP1 are equal.
3657 The register will have the same mode as CMP0. *
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/riscv/ |
| riscv.cc | 2446 /* Compare CMP0 and CMP1 using ordering test CODE and store the result
2447 in TARGET. CMP0 and TARGET are register_operands. If INVERT_PTR
2453 rtx target, rtx cmp0, rtx cmp1)
2460 mode = GET_MODE (cmp0);
2462 riscv_emit_binary (code, target, cmp0, cmp1);
2469 riscv_emit_int_order_test (code, invert_ptr, target, cmp0, cmp1);
2474 inv_code, cmp0, cmp1);
2480 riscv_emit_binary (inv_code, target, cmp0, cmp1);
2485 /* Return a register that is zero iff CMP0 and CMP1 are equal.
2486 The register will have the same mode as CMP0. *
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/loongarch/ |
| loongarch.cc | 5108 /* Compare CMP0 and CMP1 using ordering test CODE and store the result
5109 in TARGET. CMP0 and TARGET are register_operands. If INVERT_PTR
5115 rtx target, rtx cmp0, rtx cmp1)
5122 mode = GET_MODE (cmp0);
5124 loongarch_emit_binary (code, target, cmp0, cmp1);
5131 loongarch_emit_int_order_test (code, invert_ptr, target, cmp0, cmp1);
5138 inv_code, cmp0, cmp1);
5144 loongarch_emit_binary (inv_code, target, cmp0, cmp1);
5149 /* Return a register that is zero if CMP0 and CMP1 are equal.
5150 The register will have the same mode as CMP0. *
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/ |
| tree-ssa-phiopt.cc | 895 tree cmp0 = gimple_cond_lhs (comp_stmt); local
903 cmp0, cmp1);
927 comp_code = invert_tree_comparison (comp_code, HONOR_NANS (cmp0));
934 cmp0, cmp1);
|
