| /src/sys/dev/ic/ |
| ns16450reg.h | 39 #define com_dlbl 0 /* divisor latch low (W) */ macro
|
| st16650reg.h | 42 #define com_dlbl 0 /* divisor latch low (W) */ macro
|
| ns16550reg.h | 42 #define com_dlbl 0 /* divisor latch low (W) */ macro
|
| com.c | 261 [COM_REG_DLBL] = com_dlbl,
|
| /src/sys/arch/i386/stand/lib/ |
| comio_direct.c | 191 rate = inb(combase + com_dlbl) | inb(combase + com_dlbh) << 8;
203 outb(combase + com_dlbl, rate);
|
| /src/sys/arch/cobalt/stand/boot/ |
| ns16550.c | 54 CSR_WRITE(com_port, com_dlbl, speed);
|
| /src/sys/arch/hpcmips/stand/lcboot/ |
| com.c | 142 REGWRITE_1(VR4181_SIU_ADDR, com_dlbl, rate);
|
| /src/sys/arch/evbarm/stand/board/ |
| ns16550.c | 89 OUTB(com_dlbl, rate);
|
| /src/sys/arch/mmeye/stand/boot/ |
| com.c | 145 CSR_WRITE(com_port, com_dlbl, speed);
|
| /src/sys/arch/mips/ingenic/ |
| ingenic_com.c | 110 com0addr[com_dlbl] = htole32(rate & 0xff);
|
| /src/sys/arch/mips/rmi/ |
| rmixl_com.c | 164 com0addr[com_dlbl] = htobe32(rate & 0xff);
|
| /src/sys/arch/ofppc/ofppc/ |
| machdep.c | 436 dll = bus_space_read_1(&genppc_isa_io_space_tag, comh, com_dlbl);
|
| /src/sys/arch/hp300/dev/ |
| dnkbd.c | 334 bus_space_write_1(bst, bsh, com_dlbl, divisor & 0xff);
|
| /src/sys/arch/mips/sibyte/dev/ |
| sbscn.c | 1775 bus_space_write_1(iot, ioh, com_dlbl, rate);
|
