| /src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| AMDHSAKernelDescriptor.h | 75 #define COMPUTE_PGM_RSRC1(NAME, SHIFT, WIDTH) \
78 COMPUTE_PGM_RSRC1(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6),
79 COMPUTE_PGM_RSRC1(GRANULATED_WAVEFRONT_SGPR_COUNT, 6, 4),
80 COMPUTE_PGM_RSRC1(PRIORITY, 10, 2),
81 COMPUTE_PGM_RSRC1(FLOAT_ROUND_MODE_32, 12, 2),
82 COMPUTE_PGM_RSRC1(FLOAT_ROUND_MODE_16_64, 14, 2),
83 COMPUTE_PGM_RSRC1(FLOAT_DENORM_MODE_32, 16, 2),
84 COMPUTE_PGM_RSRC1(FLOAT_DENORM_MODE_16_64, 18, 2),
85 COMPUTE_PGM_RSRC1(PRIV, 20, 1),
86 COMPUTE_PGM_RSRC1(ENABLE_DX10_CLAMP, 21, 1)
173 uint32_t compute_pgm_rsrc1; member in struct:llvm::amdhsa::kernel_descriptor_t
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUTargetStreamer.cpp | 398 compute_pgm_rsrc1,
401 compute_pgm_rsrc1,
404 compute_pgm_rsrc1,
407 compute_pgm_rsrc1,
410 compute_pgm_rsrc1,
413 compute_pgm_rsrc1,
417 compute_pgm_rsrc1,
425 compute_pgm_rsrc1,
428 compute_pgm_rsrc1,
431 compute_pgm_rsrc1,
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cik_structs.h | 49 uint32_t compute_pgm_rsrc1; member in struct:cik_mqd
|
| vi_structs.h | 181 uint32_t compute_pgm_rsrc1; member in struct:vi_mqd
|
| v9_structs.h | 181 uint32_t compute_pgm_rsrc1; member in struct:v9_mqd
|
| v10_structs.h | 698 uint32_t compute_pgm_rsrc1; member in struct:v10_compute_mqd
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/ |
| AMDGPUBaseInfo.cpp | 807 AMDHSA_BITS_SET(KD.compute_pgm_rsrc1,
810 AMDHSA_BITS_SET(KD.compute_pgm_rsrc1,
812 AMDHSA_BITS_SET(KD.compute_pgm_rsrc1,
820 AMDHSA_BITS_SET(KD.compute_pgm_rsrc1,
823 AMDHSA_BITS_SET(KD.compute_pgm_rsrc1,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| AMDGPUAsmParser.cpp | 4680 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
4683 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
4686 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
4689 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
4693 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1,
4696 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1, COMPUTE_PGM_RSRC1_ENABLE_IEEE_MODE,
4701 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1, COMPUTE_PGM_RSRC1_FP16_OVFL, Val,
4711 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1, COMPUTE_PGM_RSRC1_WGP_MODE, Val,
4716 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1, COMPUTE_PGM_RSRC1_MEM_ORDERED, Val,
4721 PARSE_BITS_ENTRY(KD.compute_pgm_rsrc1, COMPUTE_PGM_RSRC1_FWD_PROGRESS, Val
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUAsmPrinter.cpp | 442 KernelDescriptor.compute_pgm_rsrc1 = PI.getComputePGMRSrc1();
|
