| /src/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.reverse/ |
| consecutive-precsave.exp | 17 # consecutive instructions in a process record logfile.
22 standard_testfile consecutive-reverse.c
23 set precsave [standard_output_file consecutive.precsave]
|
| /src/external/gpl3/gdb/dist/gdb/testsuite/gdb.reverse/ |
| consecutive-precsave.exp | 17 # consecutive instructions in a process record logfile.
22 standard_testfile consecutive-reverse.c
23 set precsave [standard_output_file consecutive.precsave]
|
| /src/external/gpl3/gdb/dist/sim/testsuite/h8300/ |
| mac.s | 119 ;; and fetch values from consecutive locations.
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/h8300/ |
| mac.s | 119 ;; and fetch values from consecutive locations.
|
| /src/external/gpl3/gcc/dist/contrib/ |
| update-copyright.py | 202 # 4: the copyright holder. Don't allow multiple consecutive
|
| /src/external/gpl3/gcc.old/dist/contrib/ |
| update-copyright.py | 201 # 4: the copyright holder. Don't allow multiple consecutive
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/pru/ |
| carry.s | 24 # Helper macro to exercise three consecutive
|
| /src/external/gpl3/gdb/dist/sim/testsuite/pru/ |
| carry.s | 24 # Helper macro to exercise three consecutive
|
| /src/external/gpl3/gcc/dist/libgcc/config/avr/ |
| lib1funcs.S | 179 ;; Negate a 2-byte value held in consecutive registers
186 ;; Negate a 4-byte value held in consecutive registers
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/avr/ |
| lib1funcs.S | 174 ;; Negate a 2-byte value held in consecutive registers
181 ;; Negate a 4-byte value held in consecutive registers
|
| /src/external/gpl3/gcc/dist/gcc/config/bfin/ |
| bfin.cc | 268 If CONSECUTIVE, return the number of registers we can save in one
272 n_dregs_to_save (bool is_inthandler, bool consecutive)
281 else if (consecutive)
290 n_pregs_to_save (bool is_inthandler, bool consecutive)
298 else if (consecutive)
2568 /* Returns the number of consecutive least significant zeros in the binary
|
| /src/external/gpl3/gcc/dist/gcc/ |
| gimple-ssa-store-merging.cc | 23 or bit-field values, to consecutive locations, into fewer wider stores.
26 consecutive memory locations:
122 on little-endian we insert stores to higher (consecutive) bitpositions
1809 bool consecutive; member in class:__anon13747::merged_store_group
2183 consecutive = true;
2320 consecutive = false;
2336 /* But we cannot use it if we don't have consecutive stores. */
2337 if (!consecutive)
3195 Handle also the consecutive INTEGER_CST stores case here,
3374 This store is consecutive to the previous one
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/bfin/ |
| bfin.cc | 268 If CONSECUTIVE, return the number of registers we can save in one
272 n_dregs_to_save (bool is_inthandler, bool consecutive)
281 else if (consecutive)
290 n_pregs_to_save (bool is_inthandler, bool consecutive)
298 else if (consecutive)
2568 /* Returns the number of consecutive least significant zeros in the binary
|
| /src/external/gpl3/gcc.old/dist/gcc/ |
| gimple-ssa-store-merging.cc | 23 or bit-field values, to consecutive locations, into fewer wider stores.
26 consecutive memory locations:
122 on little-endian we insert stores to higher (consecutive) bitpositions
1725 bool consecutive; member in class:__anon16175::merged_store_group
2099 consecutive = true;
2236 consecutive = false;
2252 /* But we cannot use it if we don't have consecutive stores. */
2253 if (!consecutive)
3108 Handle also the consecutive INTEGER_CST stores case here,
3270 This store is consecutive to the previous one
[all...] |
| /src/sys/dev/pci/ |
| if_iwnreg.h | 1211 uint32_t consecutive; member in struct:iwn_beacon_missed
|
| if_iwn.c | 2611 * If more than 5 consecutive beacons are missed,
2615 le32toh(miss->consecutive), le32toh(miss->total)));
2617 le32toh(miss->consecutive) > 5)
|
| /src/external/lgpl3/gmp/dist/mpn/powerpc64/mode64/ |
| sqr_basecase.asm | 46 C * Rewrite for POWER6 to use 8 consecutive muls, not 2 groups of 4. The
|
| /src/external/gpl2/diffutils/dist/config/ |
| texinfo.tex | 4753 % #2 is the \...x control sequence for consecutive fns (which we define).
4770 % #2 is the \...x control sequence for consecutive fns (which we define).
|
| /src/external/gpl2/gettext/dist/build-aux/ |
| texinfo.tex | 3980 % #2 is the \...x control sequence for consecutive fns (which we define).
3997 % #2 is the \...x control sequence for consecutive fns (which we define).
|
| /src/external/gpl2/grep/dist/doc/ |
| texinfo.tex | 4612 % #2 is the \...x control sequence for consecutive fns (which we define).
4629 % #2 is the \...x control sequence for consecutive fns (which we define).
|
| /src/external/gpl3/gcc.old/dist/libphobos/src/std/algorithm/ |
| iteration.d | 1606 consecutive elements of the given range. Each element of this range is a tuple
3416 // Test consecutive empty elements
3420 // Test consecutive trailing empty elements
4857 The function returns a range containing the consecutive reduced values. If
4886 a range containing the consecutive reduced values.
4906 a range containing the consecutive reduced values.
7719 Lazily iterates unique consecutive elements of the given range (functionality
|
| /src/external/gpl3/gcc/dist/gcc/config/arm/ |
| arm.cc | 2342 to execute, but mildly increases pipelining opportunity (consecutive
6151 some aggregates in consecutive registers). These aren't
6403 /* Walk down the type tree of TYPE counting consecutive base elements.
10380 where const1 is a consecutive sequence of 1-bits with the
14295 for load operations, false for store operations. CONSECUTIVE is true
14296 if the register numbers in the operation must be consecutive in the register
14308 3. If consecutive is TRUE, then for kth register being loaded,
14313 bool consecutive, bool return_pc)
14327 /* If not in SImode, then registers must be consecutive
14329 gcc_assert ((mode == SImode) || consecutive);
[all...] |
| /src/external/gpl3/gcc.old/dist/gcc/config/arm/ |
| arm.cc | 2326 to execute, but mildly increases pipelining opportunity (consecutive
6043 some aggregates in consecutive registers). These aren't
6295 /* Walk down the type tree of TYPE counting consecutive base elements.
14072 for load operations, false for store operations. CONSECUTIVE is true
14073 if the register numbers in the operation must be consecutive in the register
14085 3. If consecutive is TRUE, then for kth register being loaded,
14090 bool consecutive, bool return_pc)
14104 /* If not in SImode, then registers must be consecutive
14106 gcc_assert ((mode == SImode) || consecutive);
14209 || (consecutive
[all...] |
