| /src/sys/external/bsd/drm2/dist/drm/amd/amdkfd/ |
| kfd_mqd_manager_cik.c | 200 m->cp_hqd_ib_control = DEFAULT_MIN_IB_AVAIL_SIZE;
203 m->cp_hqd_ib_control |= IB_ATC_EN;
|
| kfd_mqd_manager_v10.c | 195 m->cp_hqd_ib_control = 3 << CP_HQD_IB_CONTROL__MIN_IB_AVAIL_SIZE__SHIFT;
|
| kfd_mqd_manager_v9.c | 232 m->cp_hqd_ib_control =
|
| kfd_mqd_manager_vi.c | 205 m->cp_hqd_ib_control = atc_bit << CP_HQD_IB_CONTROL__IB_ATC__SHIFT |
|
| /src/sys/external/bsd/drm2/dist/drm/amd/include/ |
| cik_structs.h | 102 uint32_t cp_hqd_ib_control; member in struct:cik_mqd
|
| vi_structs.h | 311 uint32_t cp_hqd_ib_control; member in struct:vi_mqd
|
| v9_structs.h | 311 uint32_t cp_hqd_ib_control; member in struct:v9_mqd
|
| v10_structs.h | 828 uint32_t cp_hqd_ib_control; member in struct:v10_compute_mqd
|
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_gfx_v7_0.c | 2866 u32 cp_hqd_ib_control; member in struct:hqd_registers
3035 mqd->cp_hqd_ib_control = RREG32(mmCP_HQD_IB_CONTROL);
|
| amdgpu_gfx_v10_0.c | 3344 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
3345 mqd->cp_hqd_ib_control = tmp;
|
| amdgpu_gfx_v8_0.c | 4540 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
4541 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MTYPE, 3);
4542 mqd->cp_hqd_ib_control = tmp;
|
| amdgpu_gfx_v9_0.c | 3452 tmp = REG_SET_FIELD(tmp, CP_HQD_IB_CONTROL, MIN_IB_AVAIL_SIZE, 3);
3453 mqd->cp_hqd_ib_control = tmp;
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_cik.c | 4482 u32 cp_hqd_ib_control; member in struct:hqd_registers
|
