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Searched refs:cpu_ip4_enable (Results 1 - 2 of 2) sorted by relevancy

/src/sys/arch/mips/cavium/
octeon_intr.c	280 cpu->cpu_ip4_enable[0] \|= __BIT(CIU_INT_MBOX_15_0); 292 cpu->cpu_ip4_enable[bank]); 299 mips3_sd(cpu->cpu_ip4_en[bank], cpu->cpu_ip4_enable[bank]); 400 cpu->cpu_ip4_enable[bank] \|= irq_mask; 401 mips3_sd(cpu->cpu_ip4_en[bank], cpu->cpu_ip4_enable[bank]); 407 cpu->cpu_ip4_enable[bank] \|= irq_mask; 408 mips3_sd(cpu->cpu_ip4_en[bank], cpu->cpu_ip4_enable[bank]); 459 cpu->cpu_ip4_enable[bank] &= ~irq_mask; 460 mips3_sd(cpu->cpu_ip4_en[bank], cpu->cpu_ip4_enable[bank]); 493 & cpu->cpu_ip4_enable[0] [all...]
octeonvar.h	`99 uint64_t cpu_ip4_enable[NBANKS]; member in struct:cpu_softc`

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