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    Searched refs:createVirtualRegister (Results 1 - 25 of 145) sorted by relevancy

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  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyFrameLowering.cpp 231 SPReg = MRI.createVirtualRegister(PtrRC);
241 Register BasePtr = MRI.createVirtualRegister(PtrRC);
248 Register OffsetReg = MRI.createVirtualRegister(PtrRC);
256 Register BitmaskReg = MRI.createVirtualRegister(PtrRC);
300 Register OffsetReg = MRI.createVirtualRegister(PtrRC);
306 SPReg = MRI.createVirtualRegister(PtrRC);
WebAssemblyPeephole.cpp 66 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
123 Register NewReg = MRI.createVirtualRegister(RegClass);
WebAssemblyRegisterInfo.cpp 123 Register OffsetOp = MRI.createVirtualRegister(PtrRC);
128 FIRegOperand = MRI.createVirtualRegister(PtrRC);
WebAssemblyReplacePhysRegs.cpp 92 VReg = MRI.createVirtualRegister(RC);
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZCopyPhysRegs.cpp 90 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
100 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
SystemZLDCleanup.cpp 135 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&SystemZ::GR64BitRegClass);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MIRVRegNamerUtils.h 70 /// createVirtualRegister - Given an existing vreg, create a named vreg to
73 unsigned createVirtualRegister(unsigned VReg);
SwiftErrorValueTracking.cpp 37 auto VReg = MF->getRegInfo().createVirtualRegister(RC);
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC);
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC);
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC);
MIRVRegNamerUtils.cpp 139 unsigned VRegRenamer::createVirtualRegister(unsigned VReg) {
170 return RC ? MRI.createVirtualRegister(RC, LowerName)
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsInstructionSelector.cpp 168 Register LUiReg = B.getMRI()->createVirtualRegister(&Mips::GPR32RegClass);
322 Register PseudoMULTuReg = MRI.createVirtualRegister(&Mips::ACC64RegClass);
373 Register JTIndex = MRI.createVirtualRegister(&Mips::GPR32RegClass);
381 Register DestAddress = MRI.createVirtualRegister(&Mips::GPR32RegClass);
389 Register Dest = MRI.createVirtualRegister(&Mips::GPR32RegClass);
401 Register DestTmp = MRI.createVirtualRegister(&Mips::GPR32RegClass);
480 Register ImplDef = MRI.createVirtualRegister(&Mips::GPR32RegClass);
483 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass);
512 Register HILOReg = MRI.createVirtualRegister(&Mips::ACC64RegClass);
598 Register GPRReg = MRI.createVirtualRegister(&Mips::GPR32RegClass)
    [all...]
Mips16ISelDAGToDAG.cpp 78 V0 = RegInfo.createVirtualRegister(RC);
79 V1 = RegInfo.createVirtualRegister(RC);
80 V2 = RegInfo.createVirtualRegister(RC);
MipsMachineFunction.cpp 50 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF));
76 Register V0 = RegInfo.createVirtualRegister(RC);
77 Register V1 = RegInfo.createVirtualRegister(RC);
MipsISelLowering.cpp 1247 Register VReg = MF.getRegInfo().createVirtualRegister(RC);
1548 Register Scratch = RegInfo.createVirtualRegister(RegInfo.getRegClass(OldVal));
1587 Register PtrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Ptr));
1588 Register IncrCopy = RegInfo.createVirtualRegister(RegInfo.getRegClass(Incr));
1602 RegInfo.createVirtualRegister(RegInfo.getRegClass(OldVal));
1631 Register ScrReg = RegInfo.createVirtualRegister(RC);
1660 Register AlignedAddr = RegInfo.createVirtualRegister(RCp);
1661 Register ShiftAmt = RegInfo.createVirtualRegister(RC);
1662 Register Mask = RegInfo.createVirtualRegister(RC);
1663 Register Mask2 = RegInfo.createVirtualRegister(RC)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86SpeculativeLoadHardening.cpp 447 PS->PoisonReg = MRI->createVirtualRegister(PS->RC);
480 PS->InitialReg = MRI->createVirtualRegister(PS->RC);
481 Register PredStateSubReg = MRI->createVirtualRegister(&X86::GR32RegClass);
754 Register UpdatedStateReg = MRI->createVirtualRegister(PS->RC);
911 Register Reg = MRI->createVirtualRegister(UnfoldedRC);
969 TargetAddrSSA.Initialize(MRI->createVirtualRegister(&X86::GR64RegClass));
1111 Register TargetReg = MRI->createVirtualRegister(&X86::GR64RegClass);
1162 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass);
1184 Register UpdatedStateReg = MRI->createVirtualRegister(PS->RC);
1508 Register Reg = MRI->createVirtualRegister(&X86::GR32RegClass)
    [all...]
X86FixupSetCC.cpp 114 Register ZeroReg = MRI->createVirtualRegister(RC);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCVSXCopy.cpp 105 Register NewVReg = MRI.createVirtualRegister(SrcRC);
127 Register NewVReg = MRI.createVirtualRegister(DstRC);
PPCRegisterInfo.cpp 580 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
669 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
677 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC);
686 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
694 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC);
790 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
802 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
835 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
847 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC);
879 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCExpandPseudos.cpp 62 unsigned AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonVExtract.cpp 71 Register ElemR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
90 Register IdxR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
125 Register AddrR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUInstructionSelector.cpp 150 Register MaskedReg = MRI->createVirtualRegister(SrcRC);
238 Register DstReg = MRI->createVirtualRegister(&SubRC);
335 Register UnusedCarry = MRI->createVirtualRegister(TRI.getWaveMaskRegClass());
358 Register DstLo = MRI->createVirtualRegister(&HalfRC);
359 Register DstHi = MRI->createVirtualRegister(&HalfRC);
370 Register CarryReg = MRI->createVirtualRegister(CarryRC);
377 .addDef(MRI->createVirtualRegister(CarryRC), RegState::Dead)
777 Register InterpMov = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass);
1377 Register M0Base = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass);
1646 Register TmpReg = MRI->createVirtualRegister(
    [all...]
SIInstrInfo.cpp 1057 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1070 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1084 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1100 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1114 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1126 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1127 Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());
1144 Register SReg = MRI.createVirtualRegister(BoolXExecRC);
1145 Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());
1175 Register Reg = MRI.createVirtualRegister(RI.getBoolRC())
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
A15SDOptimizer.cpp 420 MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass : &ARM::DPRRegClass);
435 Register Out = MRI->createVirtualRegister(TRC);
449 Register Out = MRI->createVirtualRegister(&ARM::QPRRegClass);
467 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass);
479 Register Out = MRI->createVirtualRegister(&ARM::DPR_VFP2RegClass);
495 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp 343 Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
349 Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
357 Register Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass);
AArch64CleanupLocalDynamicTLSPass.cpp 126 *TLSBaseAddrReg = RegInfo.createVirtualRegister(&AArch64::GPR64RegClass);
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVRegisterInfo.cpp 237 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
262 Register ScratchReg = MRI.createVirtualRegister(&RISCV::GPRRegClass);
284 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass);
305 Register VL = MRI.createVirtualRegister(&RISCV::GPRRegClass);

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