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  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
amdgpu_dmub_dcn20.c 138 const struct dmub_window *cw4,
165 /* TODO: Move this to CW4. */
166 dmub_dcn20_translate_addr(&cw4->offset, fb_base, fb_offset, &offset);
171 cw4->region.top - cw4->region.base - 1, DMCUB_REGION4_ENABLE,
196 /* TODO: Use CW4 instead of region 4. */
amdgpu_dmub_srv.c 341 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; local
384 cw4.offset.quad_part = mail_fb->gpu_addr;
385 cw4.region.base = cw3.region.top + 1;
386 cw4.region.top = cw4.region.base + mail_fb->size;
388 inbox1.base = cw4.region.base;
389 inbox1.top = cw4.region.top;
402 dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4,
dmub_dcn20.h 173 const struct dmub_window *cw4,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/inc/
dmub_srv.h 249 const struct dmub_window *cw4,

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