Searched refs:dce (Results 1 - 25 of 72) sorted by relevance

123

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/bios/
H A Dcommand_table_helper2.h37 enum dce_version dce);
H A Dcommand_table_helper.h37 enum dce_version dce);
H A Damdgpu_command_table_helper.c41 enum dce_version dce)
43 switch (dce) {
39 dal_bios_parser_init_cmd_tbl_helper(const struct command_table_helper ** h,enum dce_version dce) argument
H A Damdgpu_command_table_helper2.c42 enum dce_version dce)
44 switch (dce) {
40 dal_bios_parser_init_cmd_tbl_helper2(const struct command_table_helper ** h,enum dce_version dce) argument
/src/sys/dev/ofw/
H A Dofw_network_subr.c96 const struct device_compatible_entry *dce; local in function:of_network_decode_media
124 dce = device_compatible_lookup(&cp, 1, media_compat);
125 if (dce != NULL) {
126 rv[nmedia++] = (int)dce->value;
156 dce = device_compatible_lookup(&cp, 1, media_compat);
157 if (dce != NULL) {
158 *defmediap = (int)dce->value;
/src/sys/arch/virt68k/dev/
H A Dgfrtc_mainbus.c125 const struct device_compatible_entry *dce; local in function:gfrtc_mainbus_attach
136 dce = mainbus_compatible_lookup(ma, compat_data);
137 KASSERT(dce != NULL);
139 gfrtc_attach(&sc->sc_gfrtc, (dce->value == CLOCK_NONE));
141 switch (dce->value) {
146 sc->sc_ih = intr_establish(gfrtc_isrs[(int)dce->value],
150 clock_name((int)dce->value),
154 sc->sc_clock_args.ca_which = (int)dce->value;
/src/sys/dev/acpi/
H A Dtpm_acpi.c75 const struct device_compatible_entry *dce; local in function:tpm_acpi_match
88 dce = acpi_compatible_lookup(aa, compat_data);
89 KASSERT(dce != NULL);
91 if (dce->value == TPM_1_2) {
111 const struct device_compatible_entry *dce; local in function:tpm_acpi_attach
138 dce = acpi_compatible_lookup(aa, compat_data);
139 KASSERT(dce != NULL);
142 sc->sc_ver = dce->value;
H A Dacpi_button.c117 const struct device_compatible_entry *dce; local in function:acpibut_attach
123 dce = acpi_compatible_lookup(aa, compat_data);
124 KASSERT(dce != NULL);
125 type = dce->data;
H A Dcom_acpi.c110 const struct device_compatible_entry *dce; local in function:com_acpi_attach
172 dce = acpi_compatible_lookup(aa, compat_data);
173 KASSERT(dce != NULL);
175 sc->sc_type = dce->value;
H A Dpckbc_acpi.c122 const struct device_compatible_entry *dce; local in function:pckbc_acpi_attach
131 dce = acpi_compatible_lookup(aa, compat_data);
132 KASSERT(dce != NULL);
134 psc->sc_slot = dce->value;
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A DMakefile23 # Makefile for common 'dce' logic
34 AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/
H A Damdgpu_dce110_clk_mgr.c34 #include "dce/dce_11_0_d.h"
35 #include "dce/dce_11_0_sh_mask.h"
188 context->bw_ctx.bw.dce.all_displays_in_sync;
190 context->bw_ctx.bw.dce.nbp_state_change_enable == false;
192 context->bw_ctx.bw.dce.cpuc_state_change_enable == false;
194 context->bw_ctx.bw.dce.cpup_state_change_enable == false;
196 context->bw_ctx.bw.dce.blackout_recovery_time_us;
209 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz
215 context->bw_ctx.bw.dce.sclk_khz);
228 = context->bw_ctx.bw.dce
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/src/sys/dev/i2c/
H A Dmcp23xxxgpio_i2c.c155 const struct device_compatible_entry *dce; local in function:mcpgpio_i2c_attach
160 dce = iic_compatible_lookup(ia, compat_data);
161 KASSERT(dce != NULL);
164 sc->sc_variant = dce->data;
H A Dm41st84.c134 const struct device_compatible_entry *dce; local in function:strtc_model_by_number
141 for (dce = compat_data; dce->compat != NULL; dce++) {
142 sm = dce->data;
152 const struct device_compatible_entry *dce; local in function:strtc_model_by_compat
155 if ((dce = iic_compatible_lookup(ia, compat_data)) != NULL)
156 sm = dce->data;
/src/sys/dev/fdt/
H A Dusbnode.c103 const struct device_compatible_entry * const dce = local in function:usbnode_attach
106 const struct usbnode_data *und = dce->data;
/src/sys/kern/
H A Dkern_drvctl.c139 struct drvctl_event *dce, *odce; local in function:devmon_insert
156 dce = kmem_alloc(sizeof(*dce), KM_SLEEP);
157 dce->dce_event = ev;
167 TAILQ_INSERT_TAIL(&drvctl_eventq, dce, dce_link);
458 struct drvctl_event *dce; local in function:drvctl_close
466 while ((dce = TAILQ_FIRST(&drvctl_eventq)) != NULL) {
467 TAILQ_REMOVE(&drvctl_eventq, dce, dce_link);
470 prop_object_release(dce->dce_event);
471 kmem_free(dce, sizeo
597 struct drvctl_event *dce; local in function:drvctl_getevent
[all...]
/src/sys/dev/eisa/
H A Dbha_eisa.c146 const struct device_compatible_entry *dce; local in function:bha_eisa_attach
158 dce = eisa_compatible_lookup(ea, compat_data);
159 KASSERT(dce != NULL);
161 printf(": %s\n", (const char *)dce->data);
H A Dahc_eisa.c104 const struct device_compatible_entry *dce; local in function:ahc_eisa_attach
122 dce = eisa_compatible_lookup(ea, compat_data);
123 KASSERT(dce != NULL);
135 printf(": %s\n", (const char *)dce->data);
H A Dcac_eisa.c156 const struct device_compatible_entry *dce; local in function:cac_eisa_attach
177 dce = eisa_compatible_lookup(ea, compat_data);
178 KASSERT(dce != NULL);
179 ct = dce->data;
/src/sys/arch/arm/broadcom/
H A Dbcm2835_com_acpi.c77 const struct device_compatible_entry *dce; local in function:bcmcom_acpi_attach
112 dce = acpi_compatible_lookup(aa, compat_data);
113 KASSERT(dce != NULL);
115 sc->sc_type = dce->value;
/src/sys/dev/ofisa/
H A Dmcclock_ofisa.c76 const struct device_compatible_entry *dce; local in function:lookup_platform_data
86 dce = device_compatible_lookup(&cmodel, 1, platform_data);
87 if (dce != NULL) {
88 return dce->data;
H A Dpckbc_ofisa.c92 const struct device_compatible_entry *dce; local in function:pckbc_ofisa_attach
106 dce = of_compatible_lookup(phandle, port_compat_data);
107 if (dce != NULL) {
108 ofisa_intr_get(phandle, &osc->sc_intr[dce->value], 1);
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_resource.c41 #include "dce/dce_audio.h"
45 #include "dce/dce_link_encoder.h"
46 #include "dce/dce_stream_encoder.h"
47 #include "dce/dce_mem_input.h"
49 #include "dce/dce_ipp.h"
50 #include "dce/dce_transform.h"
52 #include "dce/dce_opp.h"
54 #include "dce/dce_clock_source.h"
55 #include "dce/dce_hwseq.h"
57 #include "dce/dce_au
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Damdgpu_dce112_resource.c44 #include "dce/dce_mem_input.h"
45 #include "dce/dce_transform.h"
46 #include "dce/dce_link_encoder.h"
47 #include "dce/dce_stream_encoder.h"
48 #include "dce/dce_audio.h"
49 #include "dce/dce_opp.h"
50 #include "dce/dce_ipp.h"
51 #include "dce/dce_clock_source.h"
53 #include "dce/dce_hwseq.h"
55 #include "dce/dce_ab
[all...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A DMakefile26 DC_LIBS = basics bios calcs clk_mgr dce gpio irq virtual

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